IP Library Granted Patent US 10,734,902
Granted Patent B2
US 10,734,902 · App. 16/564,221 · Granted Aug 4, 2020

Control of four-switch, single inductor, non-inverting buck-boost converters

Inventors: Jiong Ou (Baden Wuerttemberg, DE); Scott Dearborn (Brackney, PA)
Assignee: MICROCHIP TECHNOLOGY INCORPORATED
H02M3/1582H02M1/08G05F1/452H02M3/1584H02M2001/0025
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Quick Facts
Patent No.
US 10,734,902
App. No.
16/564,221
Granted
Aug 4, 2020
Kind
B2
Abstract

A power converter includes a buck leg circuit connected between a voltage input of the power converter and ground, a boost leg circuit connected between a voltage output of the power converter and ground, an inductor connected between the buck leg circuit and the boost leg circuit, an error amplifier configured to compare the voltage output of the power converter against a reference voltage to yield a feedback signal, and a control circuit. The control circuit is configured to generate a reference buck ramp configured to be compared against the feedback signal to determine whether to operate the buck leg circuit in buck mode, and to generate a reference boost ramp by superposing a variable boost ramp portion on to the reference buck ramp, the reference boost ramp configured to be compared against the feedback signal to determine whether to operate the boost leg circuit in boost mode.

Claims (42)

1. A power converter, comprising:

a buck leg circuit connected between a voltage input of the power converter and ground;

a boost leg circuit connected between a voltage output of the power converter and ground;

an inductor connected between the buck leg circuit and the boost leg circuit;

an error amplifier configured to compare the voltage output of the power converter against a reference voltage to yield a feedback signal; and

a control circuit configured to:

generate a reference buck ramp configured to be compared against the feedback signal to determine whether to operate the buck leg circuit in buck mode; and

generate a reference boost ramp by superposing a variable boost ramp portion on to the reference buck ramp, the reference boost ramp configured to be compared against the feedback signal to determine whether to operate the boost leg circuit in boost mode.

2. The power converter of claim 1 , further comprising a burst mode circuit configured to send a signal to the control circuit to operate the buck leg circuit or the boost leg circuit in a burst mode based upon a determination that a load connected to the power converter has crossed below a threshold value.

3. The power converter of claim 2 , further comprising a clamping circuit configured to modify the feedback signal to at least a minimum value based upon whether the burst mode is to be used.

4. The power converter of claim 3 , wherein the clamping circuit is further configured to modify the feedback signal based upon voltage input and voltage output of the power converter.

5. The power converter of claim 1 , further comprising a current sensor configured to sense current flowing in the power converter, and wherein the control circuit is further configured to generate the reference buck ramp based upon the current sensed by the current sensor.

6. The power converter of claim 5 , wherein the current sensor is configured to sense current in the boost leg circuit.

7. A system, comprising:

a voltage source; and

a power converter configured to receive input from the voltage source at a voltage input of the power converter, the power converter comprising:

a buck leg circuit connected between the voltage input of the power converter and ground;

a boost leg circuit connected between a voltage output of the power converter and ground;

an inductor connected between the buck leg circuit and the boost leg circuit;

an error amplifier configured to compare the voltage output of the power converter against a reference voltage to yield a feedback signal; and

a control circuit configured to:

generate a reference buck ramp configured to be compared against the feedback signal to determine whether to operate the buck leg circuit in buck mode; and

generate a reference boost ramp by superposing a variable boost ramp portion on to the reference buck ramp, the reference boost ramp configured to be compared against the feedback signal to determine whether to operate the boost leg circuit in boost mode.

8. The system of claim 7 , wherein the power converter further comprises a burst mode circuit configured to send a signal to the control circuit to operate the buck leg circuit or the boost leg circuit in a burst mode based upon a determination that a load connected to the power converter has crossed below a threshold value.

9. The system of claim 8 , wherein the power converter further comprises a clamping circuit configured to modify the feedback signal to at least a minimum value based upon whether the burst mode is to be used.

10. The system of claim 9 , wherein the clamping circuit is further configured to modify the feedback signal based upon voltage input and voltage output of the power converter.

11. The system of claim 7 , wherein the power converter further comprises a current sensor configured to sense current flowing in the power converter, and wherein the control circuit is further configured to generate the reference buck ramp based upon the current sensed by the current sensor.

12. The system of claim 11 , wherein the current sensor is configured to sense current in the boost leg circuit.

13. A method of converting power, comprising:

receiving input from a voltage source at a voltage input of a power converter;

with a buck leg circuit connected between the voltage input of the power converter and ground, operating the power converter in buck mode;

with a boost leg circuit connected between a voltage output of the power converter and ground, operating the power converter in boost mode;

connecting an inductor between the buck leg circuit and the boost leg circuit;

with an error amplifier, comparing the voltage output of the power converter against a reference voltage to yield a feedback signal; and

with a control circuit:

generating a reference buck ramp configured to be compared against the feedback signal to determine whether to operate the buck leg circuit in buck mode; and

generating a reference boost ramp by superposing a variable boost ramp portion on to the reference buck ramp, the reference boost ramp configured to be compared against the feedback signal to determine whether to operate the boost leg circuit in boost mode.

14. The method of claim 13 , wherein the power converter further comprises a burst mode circuit configured to send a signal to the control circuit to operate the buck leg circuit or the boost leg circuit in a burst mode based upon a determination that a load connected to the power converter has crossed below a threshold value.

15. The method of claim 14 , wherein the power converter further comprises a clamping circuit configured to modify the feedback signal to at least a minimum value based upon whether the burst mode is to be used.

16. The method of claim 15 , wherein the clamping circuit is further configured to modify the feedback signal based upon voltage input and voltage output of the power converter.

17. The method of claim 13 , wherein the power converter further comprises a current sensor configured to sense current flowing in the power converter, and wherein the control circuit is further configured to generate the reference buck ramp based upon the current sensed by the current sensor.

18. The method of claim 17 , wherein the current sensor is configured to sense current in the boost leg circuit.

Assignments (16)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059357/0823 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059264/0384 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0238 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 058214/0380 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2019
From: OU, JIONG; DEARBORN, SCOTT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 050312/0198 →