IP Library › Granted Patent US 10,440,160
Granted Patent B2
US 10,440,160 · App. 16/007,176 · Granted Oct 8, 2019

Scramble of payload and preamble in 10SPE with synchronous and self-synchronous scrambling

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Quick Facts
Patent No.
US 10,440,160
App. No.
16/007,176
Granted
Oct 8, 2019
Kind
B2
Abstract

An apparatus includes an encoder circuit and a scrambler circuit configured to receive a frame, the frame including a preamble and a payload. The scrambler circuit is further configured to scramble contents of the frame including the payload and at least a portion of the preamble, provide synchronization information with results of scrambling the contents, and send results of scrambling the contents to the encoder circuit.

Claims (38)

1. An apparatus, comprising:

an encoder circuit; and

a scrambler circuit configured to:

receive a frame, the frame including a preamble and a payload;

scramble contents of the frame including the payload and at least a portion of the preamble;

provide synchronization information with results of scrambling the contents; and

send results of scrambling the contents to the encoder circuit.

2. The apparatus of claim 1 , wherein the synchronization information includes data from the start or completion of scrambling in the scrambler circuit.

3. The apparatus of claim 1 , wherein the synchronization information includes data from shift registers of the scrambler circuit.

4. The apparatus of claim 1 , wherein the scrambler circuit is further configured to replace data fields of the frame with the synchronization information.

5. The apparatus of claim 1 , wherein the scrambler circuit is further configured to replace data fields of the preamble of the frame with the synchronization information.

6. An apparatus, comprising:

a decoder circuit; and

a descrambler circuit configured to:

receive a frame from the decoder circuit, the frame including a preamble and a payload;

identify synchronization information in the frame; and

using the synchronization information, descramble contents of the frame including the payload and at least a portion of the preamble.

7. The apparatus of claim 6 , wherein the synchronization information includes data from the start or completion of scrambling to generate the frame.

8. The apparatus of claim 6 , wherein the synchronization information includes data from shift registers of a scrambler circuit that generated the frame.

9. The apparatus of claim 6 , wherein the descrambler circuit is further configured to identify data fields of the frame that were replaced with the synchronization information.

10. The apparatus of claim 6 , wherein the descrambler circuit is further configured to use the synchronization information to populate shift registers of the descrambler circuit.

11. A method, comprising:

receiving a frame, the frame including a preamble and a payload;

scrambling contents of the frame including the payload and at least a portion of the preamble;

providing synchronization information with results of scrambling the contents; and

sending results of scrambling the contents an encoder circuit.

12. The method of claim 11 , wherein the synchronization information includes data from the start or completion of scrambling in the scrambler circuit.

13. The method of claim 11 , wherein the synchronization information includes data from shift registers of the scrambler circuit.

14. The method of claim 11 , further comprising replacing data fields of the frame with the synchronization information.

15. The method of claim 11 , further comprising replacing data fields of the preamble of the frame with the synchronization information.

16. A method, comprising:

receiving a frame from the decoder circuit, the frame including a preamble and a payload;

identifying synchronization information in the frame; and

using the synchronization information, descrambling contents of the frame including the payload and at least a portion of the preamble.

17. The method of claim 16 , wherein the synchronization information includes data from the start or completion of scrambling to generate the frame.

18. The method of claim 16 , wherein the synchronization information includes data from shift registers of a scrambler circuit that generated the frame.

19. The method of claim 16 , further comprising identifying data fields of the frame that were replaced with the synchronization information.

20. The method of claim 16 , further comprising using the synchronization information to populate shift registers of the descrambler circuit.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2018
From: YU, JIACHI; CHEN, DIXON; AN, HONGMING; ZANG, JOHN; YANG, KEVIN
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 046072/0380 →