Devices and methods for transmission of events with a uniform latency on serial communication links
The present disclosure relates generally to serial communication links and, more specifically, to events communicated on serial communication links and the timing of those events, for example, to achieve uniform delay among multiple event transmissions.
1. A serial communication link receiver, comprising:
receive circuitry configured to receive an event frame, wherein the event frame includes delay bits indicative of a delay between an event that occurred at a transmitter relative to a predefined bit position in a previous frame received from the transmitter; and
delay circuitry configured to:
decode the delay bits;
wait a number of clock cycles corresponding to the delay bits; and
assert a receiver-side event after waiting the number of clock cycles.
2. The serial communication link receiver of claim 1 , wherein the delay circuitry is configured to wait by counting the number of clock cycles starting at a predefined point in the event frame.
3. The serial communication link receiver of claim 2 , wherein the predefined point in the event frame is the first or last bit of the event frame.
4. The serial communication link receiver of claim 1 , wherein the receiver-side event corresponds to the event that occurred at the transmitter.
5. The serial communication link receiver of claim 1 , wherein the delay bits correspond to no delay.
6. The serial communication link receiver of claim 1 , wherein the delay circuitry is configured to decode event indicator bits and assert the receiver-side event responsive to the event indicator bits, wherein the event indicator bits indicate which event of a set of events the event frame corresponds to.
7. The serial communication link receiver of claim 1 , wherein the delay circuitry is configured to decode frames based on a protocol selected from a group consisting of a Universal Asynchronous Receiver/Transmitter, a Universal Synchronous Receiver/Transmitter, or a Universal Synchronous/Asynchronous Receiver/Transmitter.
8. The serial communication link receiver of claim 1 , wherein the delay circuitry is configured to decode in the event frame one or more error bits indicative of whether the event frame was delayed for a period longer than a frame time.
9. The serial communication link receiver of claim 1 , wherein the delay circuitry is configured to decode an error signature encoded in the delay bits, the error signature corresponding to a delay time longer than a frame time.
10. A method of receiving events over a serial communications link, comprising:
receiving an event frame;
decoding delay bits from the event frame, the delay bits indicative of a delay between an event that occurred at a transmitter relative to a predefined bit position in a previous frame;
waiting a number of clock cycles corresponding to the delay bits; and
asserting a receiver-side event after the waiting.
11. The method of claim 10 , wherein waiting the number of clock cycles corresponding to the delay bits comprises counting the number of clock cycles from a predefined point in the event frame.
12. The method of claim 11 , wherein the predefined point in the event frame is a first bit in the event frame.
13. The method of claim 10 , further comprising:
decoding event indicator bits from the event frame, wherein the event indicator bits indicate which event of a set of events the event frame corresponds to; and
wherein asserting the receiver-side event is responsive to the event indicator bits.
14. The method of claim 10 , wherein the event frame is received back-to-back with the previous frame.
15. The method of claim 10 , wherein the delay bits are indicative of no delay.
16. The method of claim 10 , further comprising decoding one or more error bits from the event frame, the error bits indicative of whether the event frame was delayed for a period longer than a frame time.
17. The method of claim 10 , further comprising, decoding an error signature encoded in the delay bits, the error signature corresponding to a delay time longer than a frame time.