IP Library Patent Application 16007119
Patent Application
App. No. 16/007,119

Scramble of Payload and Preamble in 10SPE

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Quick Facts
Patent No.
US None
App. No.
16/007,119
Abstract

An apparatus includes an encoder circuit and a scrambler circuit configured to receive a frame, the frame including a preamble and a payload. The scrambler circuit is further configured to scramble contents of the frame including the payload and at least a portion of the preamble, provide synchronization information with results of scrambling the contents, and send results of scrambling the contents to the encoder circuit.

Claims (52)

1 . An apparatus, comprising:

a first encoder circuit;

a second encoder circuit; and

a scrambler circuit configured to:

receive a frame, the frame including a preamble and a payload;

scramble contents of the frame including the payload and at least a portion of the preamble; and

send results of scrambling the contents to the second encoder circuit.

2 . The apparatus of claim 1 , wherein the portion of the preamble to be scrambled includes a plurality of identical data fields.

3 . The apparatus of claim 1 , wherein the portion of the preamble to be scrambled includes a data field with a hexadecimal value of 55.

4 . The apparatus of claim 1 , wherein the portion of the preamble to be scrambled includes data fields between information from the first encoder circuit and the payload.

5 . The apparatus of claim 1 , wherein the scrambler circuit is further configured to scramble contents of the frame including a start frame delimiter.

6 . The apparatus of claim 1 , wherein the scrambler circuit is further configured to receive the frame from the first encoder circuit.

7 . The apparatus of claim 1 , wherein the scrambler circuit is further configured to send results of scrambling the contents to the second encoder circuit through the first encoder circuit.

8 . The apparatus of claim 1 , wherein the portion of the preamble to be scrambled is located in the frame after a position of bytes inserted by the first encoder circuit.

9 . The apparatus of claim 1 , wherein the portion of the preamble to be scrambled does not include bytes inserted by the first encoder circuit.

10 . An apparatus, comprising:

a first decoder circuit;

a second decoder circuit; and

a descrambler circuit configured to:

receive a frame from the first decoder circuit, the frame including a preamble and a payload; and

descramble contents of the frame including the payload and at least a portion of the preamble.

11 . The apparatus of claim 10 , wherein the portion of the preamble to be descrambled includes a plurality of identical data fields.

12 . The apparatus of claim 10 , wherein the portion of the preamble to be descrambled includes a data field with a hexadecimal value of 55.

13 . The apparatus of claim 10 , wherein the portion of the preamble to be descrambled includes data fields between information from the first encoder circuit and the payload.

14 . The apparatus of claim 10 , wherein the descrambler circuit is further configured to descramble contents of the frame including a start frame delimiter.

15 . The apparatus of claim 10 , wherein the descrambler circuit is further configured to send results of descrambling to the second decoder circuit.

16 . The apparatus of claim 10 , wherein the descrambler circuit is further configured to receive the frame from the second decoder circuit through the first decoder circuit.

17 . The apparatus of claim 10 , wherein the portion of the preamble to be descrambled is located in the frame after a position of bytes inserted by the first encoder circuit.

18 . The apparatus of claim 10 , wherein the portion of the preamble to be descrambled does not include bytes inserted by the first encoder circuit.

19 . A method, comprising:

receiving a frame, the frame including a preamble and a payload; and

scrambling contents of the frame including the payload and at least a portion of the preamble; and

sending results of scrambling the contents to a second encoder circuit.

20 . The method of claim 19 , wherein the portion of the preamble to be scrambled includes a plurality of identical data fields.

21 . The method of claim 19 , wherein the portion of the preamble to be scrambled includes a data field with a hexadecimal value of 55.

22 . The method of claim 19 , wherein the portion of the preamble to be scrambled includes data fields between information from the first encoder circuit and the payload.

23 . The method of claim 19 , further comprising scrambling contents of the frame including a start frame delimiter.

24 . The method of claim 19 , wherein the frame is received from a first encoder circuit.

25 . The method of claim 19 , wherein results of scrambling the contents are sent to the second encoder circuit through a first encoder circuit.

26 . The method of claim 19 , wherein the portion of the preamble to be scrambled is located in the frame after a position of bytes inserted by the first encoder circuit.

27 . The method of claim 19 , wherein the portion of the preamble to be scrambled does not include bytes inserted by the first encoder circuit.

28 . A method, comprising:

receiving a frame from a first decoder circuit, the frame including a preamble and a payload; and

descrambling contents of the frame including the payload and at least a portion of the preamble.

29 . The method of claim 28 , wherein the portion of the preamble to be descrambled includes a plurality of identical data fields.

30 . The method of claim 28 , wherein the portion of the preamble to be descrambled includes a data field with a hexadecimal value of 55.

31 . The method of claim 28 , wherein the portion of the preamble to be descrambled includes data fields between information from the first encoder circuit and the payload.

32 . The method of claim 28 , further comprising descrambling contents of the frame including a start frame delimiter.

33 . The method of claim 28 , further comprising sending results of descrambling to at second decoder circuit.

34 . The method of claim 28 , wherein the frame is received from a second decoder circuit through the first decoder circuit.

35 . The method of claim 28 , wherein the portion of the preamble to be descrambled is located in the frame after a position of bytes inserted by the first encoder circuit.

36 . The method of claim 28 , wherein the portion of the preamble to be descrambled does not include bytes inserted by the first

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2018
From: YU, JIACHI; CHEN, DIXON; AN, HONGMING; ZANG, JOHN; YANG, KEVIN
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 046071/0709 →