IP Library Granted Patent US 10,284,095
Granted Patent B1
US 10,284,095 · App. 16/003,369 · Granted May 7, 2019

Method and apparatus for phase current balancing in multi-phase constant on-time buck converter

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Quick Facts
Patent No.
US 10,284,095
App. No.
16/003,369
Granted
May 7, 2019
Kind
B1
Abstract

A multi-phase DC-to-DC buck converter for receiving an input voltage and delivering an output voltage to a load by splitting the load current between a plurality of DC-to-DC buck converter cells. The converter includes a plurality of current sense circuits for sensing current in a respective converter cell, each of the current sense circuits configured to generate a respective current sense signal, an averaging circuit for receiving each of the respective current sense signals and generating an average signal, a plurality of imbalance detector circuits for comparing a respective current sense signal with the average signal and generating a respective current imbalance signal, and a plurality of ON time generators for activating a converter cell for a predetermined time interval and altering the predetermined time interval in accordance with a time integral of a respective current imbalance signal.

Claims (56)

1. A multi-phase DC-to-DC buck converter for receiving an input voltage and delivering an output voltage to a load by splitting the load current between a plurality of DC-to-DC buck converter cells, the converter comprising:

a plurality of current sense circuits each configured to sense current in a respective one of the plurality of converter cells, each of the plurality of current sense circuits configured to generate a respective current sense signal;

an averaging circuit configured to receive each of the respective current sense signals and generate an average signal;

a plurality of imbalance detector circuits each configured to compare a respective current sense signal with the average signal and generate a respective current imbalance signal; and

a plurality of ON time generators each configured to activate a respective one of the plurality of converter cells for a predetermined time interval and to alter the predetermined time interval in accordance with a time integral of a respective current imbalance signal.

2. The converter of claim 1 , wherein each of the plurality of ON time generators comprises:

a source of predetermined current;

a timing capacitor configured to integrate a sum of the predetermined current and a respective current imbalance signal and generate a ramp voltage; and

a comparator for terminating the altered predetermined time interval upon the ramp voltage exceeding a threshold.

3. The converter of claim 2 , wherein the predetermined current is substantially proportional to the input voltage.

4. The converter of claim 2 , wherein the threshold is substantially proportional to the output voltage.

5. The converter of claim 2 , further comprising a plurality of transconductor circuits, wherein each of the plurality of transconductor circuits is configured to transform a respective current imbalance signal to current.

6. The converter of claim 1 , further comprising:

a plurality of multiplier-divider circuits, wherein each of the plurality of multiplier-divider circuits is configured to multiply a respective current imbalance signal by a ratio of the input voltage and the output voltage, and to generate a normalized current imbalance signal, wherein a respective one of the plurality of ON time generators alters the predetermined time interval in accordance with a time integral of a respective normalized current imbalance signal.

7. The converter of claim 1 , further comprising:

a plurality of multiplier circuits, wherein each of the plurality of multiplier circuits is configured to multiply a respective current imbalance signal by a duty cycle of a respective one of the plurality of DC-to-DC buck converter cells and to generate a normalized current imbalance signal, wherein a respective one of the plurality of ON time generators alters the predetermined time interval in accordance with a time integral of a respective normalized current imbalance signal.

8. The converter of claim 6 , wherein each of the plurality of multiplier-divider circuits includes a corresponding transconductor circuit, wherein each corresponding transconductor circuit is configured to transform a respective current imbalance signal to current.

9. A method in a multi-phase DC-to-DC buck converter for receiving an input voltage and delivering an output voltage to a load by splitting the load current between a plurality of DC-to-DC buck converter cells, the method comprising:

sensing current in a respective one of the plurality of converter cells and generating a respective current sense signal;

receiving each of the respective current sense signals and generating an average signal;

comparing a respective current sense signal with the average signal and generating a respective current imbalance signal; and

activating a respective one of the plurality of converter cells for a predetermined time interval and altering the predetermined time interval in accordance with a time integral of a respective current imbalance signal.

10. The method of claim 9 , further comprising:

integrating a sum of a predetermined current and a respective current imbalance signal and generating a ramp voltage; and

terminating the altered predetermined time interval upon the ramp voltage exceeding a threshold.

11. The method of claim 10 , wherein the predetermined current is substantially proportional to the input voltage.

12. The method of claim 10 , wherein the threshold is substantially proportional to the output voltage.

13. The method of claim 10 , further comprising transforming a respective current imbalance signal to current.

14. The method of claim 9 , further comprising:

multiplying a respective current imbalance signal by a ratio of the input voltage and the output voltage to generate a normalized current imbalance signal; and

altering the predetermined time interval in accordance with a time integral of a respective normalized current imbalance signal.

15. The method of claim 9 , further comprising:

multiplying a respective current imbalance signal by a duty cycle of a respective one of the plurality of DC-to-DC buck converter cells to generate a normalized current imbalance signal; and

altering the predetermined time interval in accordance with a time integral of a respective normalized current imbalance signal.

16. A multi-phase DC-to-DC buck converter for receiving an input voltage and delivering an output voltage to a load by splitting the load current between a plurality of DC-to-DC buck converter cells, the converter comprising:

a plurality of current sense circuits each configured to sense current in a respective one of the plurality of converter cells, each of the plurality of current sense circuits configured to generate a respective current sense signal;

an averaging circuit configured to receive each of the respective current sense signals and generate an average signal;

a plurality of imbalance detector circuits each configured to compare a respective current sense signal with the average signal and generate a respective current imbalance signal;

a plurality of transconductor circuits, wherein each of the plurality of transconductor circuits is configured to transform a respective current imbalance signal to current;

a plurality of multiplier-divider circuits, wherein each of the plurality of multiplier-divider circuits is configured to multiply a respective current imbalance signal by a ratio of the input voltage and the output voltage, and to generate a normalized current imbalance signal; and

a plurality of ON time generators each configured to activate a respective one of the plurality of converter cells for a predetermined time interval and to alter the predetermined time interval in accordance with a time integral of a respective normalized current imbalance signal;

each of the ON time generators comprising:

a source of predetermined current;

a timing capacitor configured to integrate a sum of the predetermined current and a respective current imbalance signal and generate a ramp voltage; and

a comparator for terminating the altered predetermined time interval upon the ramp voltage exceeding a threshold.

17. A multi-phase DC-to-DC buck converter for receiving an input voltage and delivering an output voltage to a load by splitting the load current between a plurality of DC-to-DC buck converter cells, the converter comprising:

a plurality of current sense circuits each configured to sense current in a respective one of the plurality of converter cells, each of the plurality of current sense circuits configured to generate a respective current sense signal;

an averaging circuit configured to receive each of the respective current sense signals and generate an average signal;

a plurality of imbalance detector circuits each configured to compare a respective current sense signal with the average signal and generate a respective current imbalance signal;

a plurality of transconductor circuits, wherein each of the plurality of transconductor circuits is configured to transform a respective current imbalance signal to current;

a plurality of multiplier circuits, wherein each of the plurality of multiplier circuits is configured to multiply a respective current imbalance signal by a duty cycle of a respective one of the plurality of DC-to-DC buck converter cells, and to generate a normalized current imbalance signal; and

a plurality of ON time generators each configured to activate a respective one of the plurality of converter cells for a predetermined time interval and to alter the predetermined time interval in accordance with a time integral of a respective normalized current imbalance signal;

each of the ON time generators comprising:

a source of predetermined current;

a timing capacitor configured to integrate a sum of the predetermined current and a respective current imbalance signal and generate a ramp voltage; and

a comparator for terminating the altered predetermined time interval upon the ramp voltage exceeding a threshold.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2018
From: MEDNIK, ALEXANDER; STOICHITA, IOAN; TALARI, SURYA
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 046029/0366 →