IP Library Granted Patent US 10,298,189
Granted Patent B1
US 10,298,189 · App. 15/901,420 · Granted May 21, 2019

Analog-to-digital converter with autonomous gain stage and auto scaling, and related systems and methods

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Quick Facts
Patent No.
US 10,298,189
App. No.
15/901,420
Granted
May 21, 2019
Kind
B1
Abstract

Embodiments of the disclosure relate to an analog-to-digital converter (ADC) with gain adjustment. One embodiment of an ADC with autonomous gain adjustment includes an ADC, a gain stage coupled to the ADC, a scaler coupled to the ADC, and a control logic that may be configured to configure the gain of the gain stage responsive to measured output of the ADC.

Claims (39)

1. A system, comprising:

an amplifier;

an analog-to-digital-converter having at least one input coupled to at least one output of the amplifier;

a scaler coupled to at least one output of the analog-to-digital converter; and

a control circuit, the control circuit configured to:

configure a gain of the amplifier and a scaling component of the scaler for increasing an effective resolution of the analog-to-digital converter;

measure a signal level of an_input signal at the analog-to-digital converter;

detect that increasing the signal level by a step size of the analog-to-digital converter would meet or exceed a gain adjustment threshold;

configure the gain of the amplifier responsive to an adjusted gain selected such that an adjusted input signal level at the analog-to-digital converter is substantially at ½ of a reference voltage of the analog-to-digital converter; and

configure the scaling component of the scaler responsive to an adjusted scaling component that is proportional to the adjusted gain.

2. The system of claim 1 , wherein the control circuit is configured to compare the measured signal level to a lower gain adjustment threshold.

3. The system of claim 2 , wherein the control circuit is configured to configure the gain of the amplifier to be greater responsive to the measured signal level being equal to or less than the lower gain adjustment threshold.

4. The system of claim 1 , wherein configuring the gain of the amplifier comprises providing an indication of a gain selection from among a number of optional gains.

5. The system of claim 1 , wherein configuring the scaling component of the scaler comprises providing an indication of a scaler component from among a number of optional scaler components.

6. The system of claim 1 , further comprising a result register configured to receive a down scaled digital result from the scaler.

7. The system of claim 6 , further comprising a microcontroller configured to read the result register.

8. The system of claim 7 , wherein the system is an embedded system.

9. The system of claim 1 , wherein measuring the signal level of the input signal at the analog-digital converter comprises measuring the level of a digital signal measured at an output of the analog-to-digital converter.

10. The system of claim 1 , wherein the control circuit is a digital control circuit.

11. The system of claim 1 , wherein the control circuit is an analog control circuit.

12. The system of claim 1 , wherein the gain of the amplifier is a closed loop gain.

13. The system of claim 12 , wherein the closed loop gain G satisfies the expression −1<G<1.

14. The system of claim 12 , wherein the closed loop gain G satisfies the expression G≤−1 and 1≤G.

15. The system of claim 1 , wherein the control circuit is configured to measure one or more of an input or an output of the analog-to-digital converter and measure the input signal of the analog-to-digital converter responsive to the measured output.

16. A method, the method comprising: measuring a signal level of an amplified input signal at an analog-to-digital converter;

detecting that increasing the signal level by a step size of an analog-to-digital converter would meet or exceed a gain adjustment threshold;

configuring a gain of an amplifier operably coupled to the input of the analog-to-digital converter responsive to an adjusted gain selected such that an adjusted input signal level at the analog-to-digital converter is substantially at ½ of a reference voltage of the analog-to-digital converter; and

configuring a scaling component of a scaler operably coupled to an output of the analog-to-digital converter responsive to an adjusted scaling component that is proportional to the adjusted gain.

17. A system, comprising:

an analog-to-digital-converter;

a gain stage coupled to an input of the analog-to-digital converter, wherein the gain stage is a differential amplifier;

a scaler coupled to an output of the analog-to-digital converter;

a control unit configured to:

change a gain setting of the differential amplifier responsive to an indication that a change in amplitude of an input to the analog-to-digital converter equal to a step size of the analog-to-digital converter may be outside a dynamic range of the analog-to-digital converter; and

change a scaling setting of the scaler responsive to the changed gain setting; and

a microcontroller comprising at least one peripheral having the analog-to-digital converter, the gain stage, the scaler, and the control unit.

18. The system of claim 17 , wherein the control unit is a configurable state machine.

19. The system of claim 17 , wherein the control unit is further configured to measure the input to the analog-to-digital converter from a reference point, wherein the reference point is 50% of the dynamic range of the analog-to-digital converter.

20. The system of claim 17 , wherein the control unit is further configured to change the scale setting of the scaler based on a determined gain.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2018
From: LASSEN, JACOB LUNN
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 044991/0288 →
Cited By (1)
US 12,574,040