IP Library Granted Patent US 11,158,703
Granted Patent B2
US 11,158,703 · App. 16/446,557 · Granted Oct 26, 2021

Space efficient high-voltage termination and process for fabricating same

Inventors: Amaury Gendron-Hansen (Bend, OR); Dumitru Sdrulla (Bend, OR)
Assignee: Microchip Technology Inc.
H01L29/0619H01L21/761H01L29/1608H01L29/407H01L29/66712H01L29/7811
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Quick Facts
Patent No.
US 11,158,703
App. No.
16/446,557
Granted
Oct 26, 2021
Kind
B2
Abstract

A high-voltage termination for a semiconductor device includes a substrate of a first conductivity type, an implanted device region of a second conductivity type of the semiconductor device, a shallow trench disposed in the substrate adjacent to the implanted device region, a doped extension region of the second conductivity type extending between the implanted device region and a first edge of the shallow trench adjacent to the implanted device region, a junction termination extension region of the second conductivity type formed in the shallow trench contacting the extension region and extending past a second edge of the shallow trench opposite the implanted device region, an insulating layer formed over at least a portion of the extension region and over the junction termination extension region, and a metal layer formed over the insulating layer extending into at least a portion of the shallow trench and electrically connected to the extension region.

Claims (49)

1. A high-voltage termination for a semiconductor device comprising:

a substrate of a first conductivity type;

a well of a second conductivity type opposite the first conductivity type formed at a top surface of, and extending into the substrate of the first conductivity type

an implanted device region of the first conductivity type formed at the top surface of, and extending into the well of the second conductivity type, the implanted device region forming a part of the semiconductor device;

a shallow trench disposed in the substrate, the shallow trench having sloped sidewalls, a first edge that is adjacent to the well and a second edge on the opposite side of the shallow trench;

a doped extension region of the second conductivity type formed in the substrate, the doped extension region having a doping concentration greater than a doping concentration of the well and extending between the well and the first edge of the shallow trench;

a junction termination extension region of the second conductivity type formed beneath the shallow trench and contacting the doped extension region, the junction termination region having a doping concentration less than the doping concentration of the doped extension region and extending past the second edge of the shallow trench;

an insulating layer formed directly over at least a portion of the doped extension region and directly over the junction termination extension region; and

a metal layer formed over the insulating layer, the metal layer extending into at least a portion of the shallow trench, the metal layer electrically connected through a via in the insulating layer to the doped extension region.

2. The high-voltage termination of claim 1 wherein a distance from the first edge of the shallow trench to the second edge of the shallow trench, and a length of a portion of the junction termination extension region that extends past the second edge of the shallow trench together form a termination length of the high-voltage termination.

3. The high-voltage termination of claim 1 further comprising a second insulating layer formed over the metal layer and the insulating layer.

4. The high-voltage termination of claim 1 wherein the substrate of the first conductivity type is an epitaxial layer disposed over an underlying substrate.

5. The high-voltage termination of claim 4 wherein:

the epitaxial layer is an epitaxial SiC layer; and

the underlying substrate is a SiC substrate.

6. The high-voltage termination of claim 5 wherein:

the epitaxial SiC layer is doped with nitrogen; and

the underlying SiC substrate is doped with nitrogen.

7. The high-voltage termination of claim 6 wherein:

the epitaxial SiC layer is doped with nitrogen to a concentration of from about 1e14/cm 3 to about 2e16/cm 3 ; and

the underlying SiC substrate is doped with nitrogen to a resistivity of about 0.02 ohm-cm.

8. The high-voltage termination of claim 1 wherein:

the doped extension region is implanted with one of aluminum and boron; and

the junction termination extension region is implanted with one of aluminum and boron.

9. The high-voltage termination of claim 8 wherein:

the doped extension region is implanted with one of aluminum and boron with a dose of between about 1e13/cm 2 to about 1e15/cm 2 ; and

the junction termination extension region is implanted with one of aluminum and boron with a dose of between about 1e11/cm 2 to about 1e13/cm 2 .

10. The high-voltage termination of claim 1 ,

wherein the shallow trench has a depth of between about 2 μm to about 5 μm; and

wherein a length of the shallow trench is a distance from the first edge of the shallow trench to the second edge of the shallow trench,

wherein the high-voltage termination has a termination length defined by the length of the shallow trench and an extension of the junction termination extension region beyond the second edge of the trench, and

wherein the termination length is selected to withstand a preselected blocking voltage.

11. The high-voltage termination of claim 2 wherein the termination length is between about 20 μm to about 55 μm.

12. A transistor with high-voltage termination, comprising:

a substrate of a first conductivity type;

a drain region formed in a back side of the substrate;

a well of a second conductivity type opposite the first conductivity type formed at a top surface of, and extending into, the substrate;

a source region formed within the well;

a gate disposed over the source and drain regions;

a shallow trench disposed in the substrate, the shallow trench having sloped sidewalls, a first edge that is adjacent to the well and a second edge on the opposite side of the shallow trench;

a doped extension region of the second conductivity type, opposite the first conductivity type, formed in the substrate and extending from the first edge of the shallow trench and contacting the well;

a junction termination extension region of the second conductivity type formed beneath the shallow trench and contacting the doped extension region, the junction termination extension region extending past the second edge of the shallow trench;

an insulating layer formed directly over at least a portion of the extension region and directly over the junction termination extension region; and

a metal layer formed over the insulating layer, the metal layer extending into at least a portion of the shallow trench, the metal layer electrically connected through a via in the insulating layer to the doped extension region.

13. The transistor of claim 12 ,

wherein the well is a p-well,

wherein the junction termination extension region has a doping concentration less than a doping concentration of the doped extension region, and

wherein the doping concentration of the doped extension region is greater than a doping concentration of the well.

14. The transistor of claim 12 wherein a distance from the first edge of the shallow trench to the second edge of the shallow trench, and a length of a portion of the junction termination extension region that extends past the second edge of the shallow trench together form a termination length of the high-voltage termination for the transistor.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2019
From: GENDRON-HANSEN, AMAURY; SDRULLA, DUMITRU
To: MICROCHIP TECHNOLOGY INC.
Reel/Frame 049527/0083 →