Techniques for making integrated inductors and related semiconductor devices, electronic systems, and methods
In some embodiments, integrated inductors may be built using processes for forming interconnects of semiconductor devices without requiring additional process steps. Integrated inductor coils may be formed by, for example, shunting an overlying electrically conductive material, such as, for example, bond pad metals (e.g., aluminum and alloys thereof), to an underlying electrically conductive material, such as, for example, an uppermost layer of wiring formed using Damascene processes (e.g., utilizing copper and alloys thereof), without vias to interconnect the two materials. In some embodiments, integrated inductors formed utilizing such processes may have a symmetric spiral design.
1. A semiconductor device, comprising:
a substrate comprising a semiconductor material; and
an integrated inductor comprising coils supported by the substrate, the coils comprising:
an electrically conductive material at an uppermost portion of an interconnect formed on the substrate;
another, different electrically conductive material in direct contact with portions of the electrically conductive material, the other different electrically conductive material embedded in a dielectric material with a barrier material interposed between the other, different electrically conductive material and the dielectric material; and
an overpass/underpass region in which an electrically isolated portion of the electrically conductive material extends under another electrically isolated portion of the other electrically conductive material, a passivation material located between the electrically isolated portion of the portion of the electrically conductive material and the other portion of the other electrically conductive material;
wherein a portion of the passivation material covers corresponding portions of the barrier material and the other, different electrically conductive material.
2. The semiconductor device of claim 1 , wherein the integrated inductor is free of through-hole type vias between the electrically conductive material and the other electrically conductive material of the integrated inductor.
3. The semiconductor device of claim 1 , wherein the electrically conductive material of the coils comprises a copper or copper alloy material and the other electrically conductive material comprises aluminum or aluminum alloy.
4. The semiconductor device of claim 1 , wherein the integrated inductor is at least substantially symmetrical.
5. The semiconductor device of claim 1 , wherein the electrically conductive material is located at an uppermost layer of those layers of the interconnect formed using Damascene processes.
6. A semiconductor device, comprising:
a substrate comprising a semiconductor material; and
an integrated inductor comprising coils supported by the substrate, the coils comprising:
an electrically conductive material in an uppermost layer of an interconnect formed the substrate embedded in a passivation material;
another electrically conductive material above the uppermost layer in direct contact with portions of the electrically conductive material, wherein the other electrically conductive material is different from the electrically conductive material, the other different electrically conductive material embedded in a dielectric material with a harder material interposed between the other, different electrically conductive material and the dielectric material, wherein a portion of the passivation material covers corresponding portions of the barrier material and the other electrically conductive material; and
an overpass/underpass region in which:
the electrically conductive material of one coil extends continuously from before the overpass/underpass region, through the overpass/underpass region, and beyond the overpass/underpass region;
a portion of the other electrically conductive material of another coil extends continuously from before the overpass/underpass region, through the overpass/underpass region and under the electrically conductive material of the one coil, and beyond the overpass/underpass region;
the other electrically conductive material of the one coil is discontinuous, extending toward the overpass/underpass region, being omitted within the overpass/underpass region, and extending away from the overpass/underpass region; and
the electrically conductive material of the other coil is discontinuous, extending toward the overpass/underpass region, being omitted within the overpass/underpass region, and extending away from the overpass/underpass region.
7. The semiconductor device of claim 6 , wherein the integrated inductor is free of through-hole type vias extending between the electrically conductive material and the other electrically conductive material of the integrated inductor.
8. The semiconductor device of claim 6 , wherein the electrically conductive material is located at an uppermost layer of those layers of the interconnect formed using Damascene processes.
9. A method of making a semiconductor device, comprising:
placing a passivation material over an interconnect formed on a semiconductor substrate;
exposing portions of coils of an integrated inductor supported on the substrate by removing portions of the passivation material, the portions of the coils comprising an electrically conductive material at an uppermost portion of the interconnect, the portions of the coils embedded in a dielectric material with a barrier material interposed between the other, different electrically conductive material and the dielectric material, wherein a portion of the passivation material covers corresponding portions of the harrier material and the other electrically conductive material;
placing another, different electrically conductive material in direct contact with the electrically conductive material of the portions of the coils to form the integrated inductor;
leaving another portion of the coils of the integrated inductor covered by another portion of the passivation material; and
placing a portion of the other electrically conductive material over another portion of the passivation material to form an overpass/underpass region, the other portion of the coils being electrically isolated from the portion of the other electrically conductive material located over the other portion of the passivation material.
10. The method of claim 9 , wherein exposing the portions of the coils of the integrated inductor by removing the portions of the passivation material comprises exposing copper material supported at least partially within a barrier material of the substrate.
11. The method of claim 9 , further comprising forming a bond pad concurrently while forming the integrated inductor by exposing a portion of the bond pad by removing another portion of the passivation material, the portion of the bond pad comprising the electrically conductive material, and placing the other electrically conductive material in direct contact with the portion of the bond pad.
12. An electronic system, comprising:
a substrate comprising a semiconductor material, the substrate supporting a radio frequency, millimeter wave, or power supply circuit;
wherein the radio frequency, millimeter wave, or power supply circuit comprises an integrated inductor comprising coils, the coils comprising:
an electrically conductive material proximate to a surface of the substrate, the electrically conductive material embedded in a passivation material;
another, different electrically conductive material in direct contact with portions of the electrically conductive material, the other different electrically conductive material embedded in a dielectric material with a harrier material interposed between the other, different electrically conductive material and the dielectric material, wherein a portion of the passivation material covers corresponding portions of the barrier material and the other electrically conductive material; and
an overpass/underpass region directing an electrically isolated portion of the electrically conductive material under another electrically isolated portion of the other electrically conductive material, the passivation material located between the electrically isolated portion of the portion of the electrically conductive material and the other portion of the other electrically conductive material.
13. The electronic system of claim 12 , wherein the integrated inductor is free of through-hole type vias between the electrically conductive material and the other electrically conductive material of the integrated inductor.
14. The electronic system of claim 12 , further comprising a bond pad comprising the electrically conductive material and the other electrically conductive material in direct contact with the electrically conductive material, the electrically conductive material of the bond pad at a same distance relative to an inactive surface of the substrate as the electrically conductive material of the integrated inductor, the other electrically conductive material of the bond pad at a same distance relative to an inactive surface of the substrate as the electrically conductive material of the integrated inductor.
15. An integrated inductor, comprising:
coils located partially within an interconnect of a semiconductor device, the coils comprising:
a first electrically conductive material located within an uppermost layer of an interconnect formed on the semiconductor device, the first electrically conductive material embedded in a dielectric material with a barrier material interposed between the First electrically conductive material and the dielectric material;
a second electrically conductive material overlying, and in direct contact with, the first electrically conductive material, the second electrically conductive material embedded in a passivation material, wherein a portion of the passivation material covers corresponding portions of the harrier material and the other electrically conductive material; and
an overpass/underpass region where the second electrically conductive material is electrically isolated from, and not indirect contact with, the first electrically conductive material.
16. The integrated inductor of claim 15 , wherein the first electrically conductive material is different from the second electrically conductive material.
17. The integrated inductor of claim 16 , wherein the first electrically conductive material comprises a copper or copper alloy material and the second electrically conductive material comprises aluminum or aluminum alloy.
18. The integrated inductor of claim 15 , wherein the first electrically conductive material of one coil passing over another coil is discontinuous in the overpass/underpass region and the second electrically conductive material of the other coil passing under the one coil is discontinuous in the overpass/underpass region.
19. The semiconductor device of claim 15 , wherein the electrically conductive material is located at an uppermost layer of those layers of the interconnect formed using Damascene processes.