IP Library Granted Patent US 11,467,044
Granted Patent B2
US 11,467,044 · App. 16/675,736 · Granted Oct 11, 2022

Multi-channel remote temperature monitor

Inventors: John Austin (Chandler, AZ); Chihmin Yu (Chandler, AZ); Ezana Haile (Chandler, AZ); Sam Alexander (Chandler, AZ)
Assignee: Microchip Technology Incorporated
G01K15/005G01K7/00
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Quick Facts
Patent No.
US 11,467,044
App. No.
16/675,736
Granted
Oct 11, 2022
Kind
B2
Abstract

A system includes a conditioning circuit, resistors connected to pins of the conditioning circuit, and measurement sensors connected to pins of the conditioning circuit. The conditioning circuit is configured to determine resistance values of the resistors and to determine a set of addresses for the measurement sensors based upon a combination of the resistance values of the resistors.

Claims (71)

1. A system, comprising:

a conditioning circuit;

a first resistor connected to a first pin of the conditioning circuit;

a second resistor connected to a second pin of the conditioning circuit;

a first measurement sensor connected to the conditioning circuit; and

a second measurement sensor connected to the conditioning circuit; and

wherein the conditioning circuit is configured to:

determine a first resistance value of the first resistor;

determine a second resistance value of the second resistor; and

determine a set of addresses for the first measurement sensor and the second measurement sensor based upon a combination of the first resistance value and the second resistance value.

2. The system of claim 1 , wherein the conditioning circuit is further configured to assign unique addresses for each of the first measurement sensor and the second measurement from the set of addresses.

3. The system of claim 2 , wherein the conditioning circuit is further configured to assign unique addresses for each of the first measurement sensor and the second measurement from the set of addresses, including:

a first assignment of a first pin of the conditioning circuit to the first measurement sensor; and

a second assignment of a second pin of the conditioning circuit to the second measurement sensor.

4. The system of claim 2 , wherein the conditioning circuit is further configured to assign unique addresses for each of the first measurement sensor and the second measurement from the set of addresses, including:

a first assignment of a first pin of the conditioning circuit to a first terminal of the first measurement sensor;

a second assignment of a second pin of the conditioning circuit to a first terminal of the second measurement sensor;

a third assignment of the first pin of the conditioning circuit to a second terminal of the first measurement sensor; and

a fourth assignment of the second pin of the conditioning circuit to a second terminal of the second measurement sensor.

5. The system of claim 1 , wherein the conditioning circuit is further configured to periodically store measurements from the first measurement sensor and the second measurement sensor.

6. The system of claim 1 , wherein the conditioning circuit is further configured to:

compare a first measurement from the first measurement sensor against a first threshold;

compare a second measurement from the second measurement sensor against a second threshold; and

if the first measurement exceeds the first threshold or the second measurement exceeds the second threshold, issue an alert to a measurement monitoring process.

7. The system of claim 1 , wherein the conditioning circuit is further configured to:

receive a query for a first address, the first address included in the set of addresses, from a host; and

provide a measurement status of the first measurement sensor using an association of the first address with the first measurement sensor.

8. An apparatus, comprising:

a plurality of input and output pins; and

a conditioning circuit configured to:

determine a first resistance value of a first resistor connected to a first pin of the input and output pins;

determine a second resistance value of a second resistor connected to a second pin of the input and output pins; and

determine a set of addresses for a first measurement sensor and a second measurement sensor based upon a combination of the first resistance value and the second resistance value, the first measurement sensor and the second measurement sensor connected to the conditioning circuit through the input and output pins.

9. The apparatus of claim 8 , wherein the conditioning circuit is further configured to assign unique addresses for each of the first measurement sensor and the second measurement from the set of addresses.

10. The apparatus of claim 9 , wherein the conditioning circuit is further configured to assign unique addresses for each of the first measurement sensor and the second measurement from the set of addresses, including:

a first assignment of a first pin of the input and output pins to the first measurement sensor; and

a second assignment of a second pin of the input and output pins to the second measurement sensor.

11. The apparatus of claim 9 , wherein the conditioning circuit is further configured to assign unique addresses for each of the first measurement sensor and the second measurement from the set of addresses, including:

a first assignment of a first pin of the input and output pins to a first terminal of the first measurement sensor;

a second assignment of a second pin of the input and output pins to a first terminal of the second measurement sensor;

a third assignment of the first pin of the input and output pins to a second terminal of the first measurement sensor; and

a fourth assignment of the second pin of the input and output pins to a second terminal of the second measurement sensor.

12. The apparatus of claim 8 , wherein the conditioning circuit is further configured to periodically store measurements from the first measurement sensor and the second measurement sensor.

13. The apparatus of claim 8 , wherein the conditioning circuit is further configured to:

compare a first measurement from the first measurement sensor against a first threshold;

compare a second measurement from the second measurement sensor against a second threshold; and

if the first measurement exceeds the first threshold or the second measurement exceeds the second threshold, issue an alert to a measurement monitoring process.

14. The apparatus of claim 8 , wherein the conditioning circuit is further configured to:

receive a query for a first address, the first address included in the set of addresses, from a host; and

provide a measurement status of the first measurement sensor using an association of the first address with the first measurement sensor.

15. A method, comprising:

determining a first resistance value of a first resistor connected to a first pin of input and output pins of a conditioning circuit;

determining a second resistance value of a second resistor connected to a second pin of input and output pins of a conditioning circuit; and

determining a set of addresses for a first measurement sensor and a second measurement sensor based upon a combination of the first resistance value and the second resistance value, the first measurement sensor and the second measurement sensor connected to the conditioning circuit through the input and output pins.

16. The method of claim 15 , further comprising assigning unique addresses for each of the first measurement sensor and the second measurement from the set of addresses.

17. The method of claim 16 , further comprising assigning unique addresses for each of the first measurement sensor and the second measurement from the set of addresses, including:

a first assignment of a first pin of the input and output pins to the first measurement sensor; and

a second assignment of a second pin of the input and output pins to the second measurement sensor.

18. The method of claim 16 , further comprising assigning unique addresses for each of the first measurement sensor and the second measurement from the set of addresses, including:

making a first assignment of a first pin of the input and output pins to a first terminal of the first measurement sensor;

making a second assignment of a second pin of the input and output pins to a first terminal of the second measurement sensor;

making a third assignment of the first pin of the input and output pins to a second terminal of the first measurement sensor; and

making a fourth assignment of the second pin of the input and output pins to a second terminal of the second measurement sensor.

19. The method of claim 15 , further comprising periodically storing measurements from the first measurement sensor and the second measurement sensor.

20. The method of claim 15 , further comprising:

comparing a first measurement from the first measurement sensor against a first threshold;

comparing a second measurement from the second measurement sensor against a second threshold; and

if the first measurement exceeds the first threshold or the second measurement exceeds the second threshold, issuing an alert to a measurement monitoring process.

21. The method of claim 15 , further comprising:

receiving a query for a first address, the first address included in the set of addresses, from a host; and

providing a measurement status of the first measurement sensor using an association of the first address with the first measurement sensor.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2019
From: AUSTIN, JOHN; YU, CHIHMIN; HAILE, EZANA; ALEXANDER, SAM
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 050942/0277 →