IP Library Granted Patent US 10,897,274
Granted Patent B2
US 10,897,274 · App. 16/174,724 · Granted Jan 19, 2021

Shared radio arbitration

Inventor: Vishal Sharma (Irvine, CA)
Assignee: MICROCHIP TECHNOLOGY INCORPORATED
H04B1/0057G06F13/362G06F13/4022H04W72/10H04W88/12H04W88/182
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Quick Facts
Patent No.
US 10,897,274
App. No.
16/174,724
Granted
Jan 19, 2021
Kind
B2
Abstract

A radio arbiter circuit is disclosed comprising a digital connection to a radio circuit, which comprises a transmitter, a receiver, and a radio frequency antenna; a first connection to a first network link controller, which comprises a first baseband processor and a first interface to a processor bus; a second connection to a second network link controller, which comprises a second baseband processor and a second interface to a processor bus; a multiplexer for coupling either the first network link controller or the second network link controller to the radio circuit via the digital connection; and a control input to the multiplexer for selecting which network link controller has control of the radio circuit.

Claims (133)

1. A radio arbiter circuit comprising:

a digital connection to a radio circuit, which comprises a transmitter, a receiver, and a radio frequency antenna;

a first connection to a first network link controller, which comprises a first baseband processor and a first interface to a processor bus;

a second connection to a second network link controller, which comprises a second baseband processor and a second interface to a processor bus;

a multiplexer for coupling either the first network link controller or the second network link controller to the radio circuit via the digital connection; and

a control input to the multiplexer for selecting which network link controller has control of the radio circuit,

wherein

the control input is set to select the first network link controller;

a first radio request from the first network link controller is active and associated with a first priority value; and

the radio arbiter circuit is configured to:

accept a second radio access request from the second network link controller comprising a second priority value; and

based at least in part on a comparison between the first priority value and the second priority value:

send a power down signal to the radio circuit; and

set the control input to select the second network link controller;

wherein the first radio request is further associated with a time-sensitive attribute, and

the radio arbiter circuit is further configured to, based at least in at least in part on a comparison between the first priority value and the second priority value, send an aborted request signal to the first network link controller.

2. The radio arbiter circuit of claim 1 , further configured to operate in:

a static operating mode wherein the control input is set to a predetermined value, or

a dynamic operating mode wherein the control input is determined upon receipt of a radio access request from either the first or the second network link controller.

3. The radio arbiter circuit of claim 1 wherein the radio arbiter circuit is configured to perform the following ordered steps:

accept the first radio access request from the first network link controller to perform a first task, the request comprising the first priority value;

determine the control input to grant control of the radio circuit by the first network link controller;

accept the second radio access request from the second network link controller to perform a second task, the request comprising the second priority value greater than the first priority value; and

prior to completion of the first radio access, determine the control input to grant control of the radio circuit by the second network link controller.

4. The radio arbiter circuit of claim 3 wherein the radio arbiter circuit is further configured to:

increment the first priority value.

5. The radio arbiter circuit of claim 1 further configured to:

determine a first access request type from the first radio access request;

determine a priority adjustment value based at least in part on the first access request type; and

adjust the first priority value based at least in part on the priority adjustment value.

6. A radio arbiter circuit comprising:

a digital connection to a radio circuit, which comprises a transmitter, a receiver, and a radio frequency antenna;

a first connection to a first network link controller, which comprises a first baseband processor and a first interface to a processor bus;

a second connection to a second network link controller, which comprises a second baseband processor and a second interface to a processor bus;

a multiplexer for coupling either the first network link controller or the second network link controller to the radio circuit via the digital connection; and

a control input to the multiplexer for selecting which network link controller has control of the radio circuit,

wherein

the control input is set to select the first network link controller;

a first radio request from the first network link controller is active and associated with a first priority value; and

the radio arbiter circuit is configured to:

accept a second radio access request from the second network link controller comprising a second priority value, and

based at least in part on a comparison between the first priority value and the second priority value:

send a power down signal to the radio circuit; and

set the control input to select the second network link controller;

Wherein the first radio request is not associated with a time-sensitive attribute, and the radio arbiter circuit is further configured to:

based at least in part on a comparison between the first priority value and the second priority value, send a delayed request signal to the first network link controller, and

upon completion of the second radio access request, set the control input to select the first network link controller.

7. The radio arbiter circuit of claim 6 , further configured to operate in:

a static operating mode wherein the control input is set to a predetermined value, or

a dynamic operating mode wherein the control input is determined upon receipt of a radio access request from either the first or the second network link controller.

8. The radio arbiter circuit of claim 6 wherein the radio arbiter circuit is configured to perform the following ordered steps:

accept the first radio access request from the first network link controller to perform a first task, the request comprising the first priority value;

determine the control input to grant control of the radio circuit by the first network link controller,

accept the second radio access request from the second network link controller to perform a second task, the request comprising the second priority value greater than the first priority value, and

prior to completion of the first radio access, determine the control input to grant control of the radio circuit by the second network link controller.

9. The radio arbiter circuit of claim 8 wherein the radio arbiter circuit is further configured to:

increment the first priority value.

10. The radio arbiter circuit of claim 6 further configured to:

determine a first access request type from the first radio access request;

determine a priority adjustment value based at least in part on the first access request type; and

adjust the first priority value based at least in part on the priority adjustment value.

11. An integrated circuit comprising:

a CPU,

a memory,

a first network link controller configured to communicate with a Zigbee network,

a second network link controller configured to communicate with a Bluetooth network,

a bus coupling the CPU to the memory, the first network link controller, and the second network link controller, and

a radio arbiter circuit comprising:

a digital connection to a radio circuit, which comprises a transmitter, a receiver, and a radio frequency antenna;

a first connection to the first network link controller comprising a first baseband processor;

a second connection to the second network link controller comprising a second baseband processor;

a multiplexer for coupling either the first network link controller or the second network link controller to the radio circuit via the digital connection; and

a control input to the multiplexer for selecting which network link controller has control of the radio circuit,

wherein

the control input is set to select the first network link controller;

a first radio request from the first network link controller is active and associated with a first priority value; and

the radio arbiter circuit is configured to;

accept a second radio access request from the second network link controller comprising a second priority value; and

based at least in part on a comparison between the first priority value and the second priority value:

send a power down signal to the radio circuit; and

set the control input to select the second network link controller, wherein the first radio request is further associated with a time-sensitive attribute, and

the radio arbiter circuit is further configured to, based at least in part on a comparison between the first priority value and the second priority value, send an aborted request signal to the first network link controller.

12. The integrated circuit of claim 11 wherein the radio arbiter circuit is further configured to operate in:

a static operating mode wherein the control input is set to a predetermined value, or

a dynamic operating mode wherein the control input is determined upon receipt of a radio access request from either the first or the second network link controller.

13. The integrated circuit of claim 11 wherein the radio arbiter circuit is further configured to perform the following ordered steps:

accept the first radio access request from the first network link controller to perform a first task, the request comprising the first priority value;

determine the control input to grant control of the radio circuit by the first network link controller;

accept the second radio access request from the second network link controller to perform a second task, the request comprising the second priority value greater than the first priority value; and

determine the control input to grant control of the radio circuit by the second network link controller.

14. The integrated circuit of claim 13 wherein the radio arbiter circuit is further configured to:

Increment the first priority value.

15. The integrated circuit of claim 11 further configured to:

determine a first access request type from the first radio access request;

determine a priority adjustment value based at least in part on the first access request type; and

adjust the first priority value based at least in part on the priority adjustment value.

16. An integrated circuit comprising:

a CPU,

a memory,

a first network link controller configured to communicate with a Zigbee network,

a second network link controller configured to communicate with a Bluetooth network,

a bus coupling the CPU to the memory, the first network link controller, and the second network link controller, and

a radio arbiter circuit comprising:

a digital connection to a radio circuit, which comprises a transmitter, a receiver, and a radio frequency antenna;

a first connection to the first network link controller comprising baseband processor;

a second connection to the second network link controller comprising a second baseband processor;

a multiplexer for coupling either the first network link controller or the second network link controller to the radio circuit via the digital connection; and

a control input to the multiplexer for selecting which network link controller has control of the radio circuit,

wherein

the control input is set to select the first network link controller,

a first radio request from the first network link controller is active and associated with a first priority value; and

the radio arbiter circuit is configured to:

accept a second radio access request from the second network link controller comprising a second priority value; and

based at least in part on a comparison between the first priority value and the second priority value:

send a power down signal to the radio circuit; and

set the control input to select the second network link controller,

wherein the first radio request is not associated with a time-sensitive attribute, and the radio arbiter circuit is further configured to:

based at least in part on a comparison between the first priority value and the second priority value, send a delayed request signal to the first network link controller, and

upon completion of the second radio access request, set the control input to select the first network link controller.

17. The integrated circuit of claim 16 wherein the radio arbiter circuit is further configured to operate in:

a static operating mode wherein the control input is set to a predetermined value, or

a dynamic operating mode wherein the control input is determined upon receipt of a radio access request from either the first or the second network link controller.

18. The integrated circuit of claim 16 wherein the radio arbiter circuit is further configured to perform the following ordered steps:

accept the first radio access request from the first network link controller to perform a first task, the request comprising the first priority value;

determine the control input to grant control of the radio circuit by the first network link controller,

accept the second radio access request from the second network link controller to perform a second task, the request comprising the second priority value greater than the first priority value; and

determine the control input to grant control of the radio circuit by the second network link controller.

19. The integrated circuit of claim 18 wherein the radio arbiter circuit is further configured to:

Increment the first priority value.

20. The integrated circuit of claim 16 further configured to:

determine a first access request type from the first radio access request;

determine a priority adjustment value based at least in part on the first access request type; and

adjust the first priority value based at least in part on the priority adjustment value.

Assignments (12)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2018
From: SHARMA, VISHAL
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 047356/0037 →
Continuity (2)
Provisional Application 62580535 · Nov 2, 2017
Related Publication 20190132013A1 · May 2, 2019