IP Library Granted Patent US 11,169,033
Granted Patent B2
US 11,169,033 · App. 16/105,206 · Granted Nov 9, 2021

Base resistance cancellation method and related methods, systems, and devices

Inventors: Hyunsoo Yeom (Chandler, AZ); Cheng Xu (Chandler, AZ)
Assignee: Microchip Technology Incorporated
G01K7/16
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Quick Facts
Patent No.
US 11,169,033
App. No.
16/105,206
Granted
Nov 9, 2021
Kind
B2
Abstract

Methods, systems and devices of the present disclosure involve techniques for cancelling base resistance error otherwise present in remote temperature sensors such as remote diode temperature sensors. In one or more embodiments, measurement logic configured to determine a temperature of or near a remote temperature sensor may be configured to determine an error cancelling coefficient and to calculate a temperature value, at least in part, responsive to the error cancelling coefficient. In some cases, error cancelling coefficients may be determined using one or more calibration techniques.

Claims (34)

1. A sensing circuit for a remote diode temperature sensor, comprising:

a biasing circuit configured to provide a number of biasing currents to at least one sensing path of two sensing paths associated with a remote temperature sensor;

a sensing circuit configured to measure voltage levels exhibited by a voltage across the two sensing paths while the biasing currents are being provided to the at least one sensing path; and

a measurement circuit configured to:

determine at least two voltage changes responsive to the measured voltages; and

determine a temperature sensed by the remote temperature sensor responsive to the at least two voltage changes, the bias currents, and an error cancelling coefficient,

wherein the error cancelling coefficient comprises a value for a route resistance of the two sensing paths.

2. The sensing circuit of claim 1 , wherein the number of biasing currents comprises pairs of biasing currents.

3. The sensing circuit of claim 1 , wherein each biasing current of the number of biasing currents are proportional to each of the other biasing currents of the number of biasing currents.

4. The sensing circuit of claim 3 , wherein each biasing current of the number of biasing currents is different than each of the other biasing currents of the one or more biasing currents.

5. The sensing circuit of claim 1 , wherein each biasing current of the number of biasing currents is a multiple of a specified current.

6. The sensing circuit of claim 5 , wherein the multiple is of the range 1x to 20x, inclusive.

7. The sensing circuit of claim 1 , wherein the biasing circuit is configured to provide a first biasing current that is a first multiple of a specified current, and the sensing circuit is configured to measure a first voltage level of the voltage across the two sensing paths while the first biasing current is being provided.

8. The sensing circuit of claim 7 , wherein the biasing circuit is configured to provide a second biasing current that is a second multiple of the specified current, and the sensing circuit is configured to measure a second voltage level of a voltage across the two sensing paths while the second biasing current is being provided.

9. The sensing circuit of claim 1 , wherein the measurement logic circuit is configured to:

determine a route resistance associated with the at least one sensing path operatively coupled to the two sensing paths responsive to the determined changes in voltage level; and

determine a base resistance responsive to the determined changes in voltage level.

10. The sensing circuit of claim 9 , wherein the error cancelling coefficient is a sum of the route resistance and the base resistance.

11. A method of cancelling a base-resistance error from a temperature calculation based on a remote temperature sensor, comprising:

providing a number of bias currents to at least one sensing path of two sensing paths associated with the remote temperature sensor;

measuring voltage levels exhibited by a voltage across the two sensing paths while the number of bias currents are provided to the at least one sensing path;

determining at least two voltage level changes responsive to the measured voltage levels; and

determining a temperature sensed by the remote temperature sensor responsive to the at least two voltage level changes, the bias currents, and an error cancelling coefficient,

wherein the error cancelling coefficient comprises a value for a route resistance of the two sensing paths.

12. The method of claim 11 , further comprising:

measuring a first voltage level change across the two sensing paths responsive to a first pair of bias currents;

measuring a second voltage level change across the two sensing paths responsive to a second pair of bias currents;

measuring a third voltage level change across the two sensing paths responsive to a third pair of bias currents; and

determining the error cancelling coefficient responsive to the first voltage level change, the second voltage level change, and the third voltage level change.

13. The method of claim 11 , further comprising:

measuring a first voltage level change across the two sensing paths responsive to a first pair of bias currents;

measuring a second voltage level change across the two sensing paths responsive to a second pair of bias currents; and

determining the error cancelling coefficient responsive to the first voltage level change and the second voltage level change.

14. The method of claim 13 , wherein the first pair of bias currents are each a different multiple of a specified bias current, and the second pair of bias currents are each a different multiple of the specified bias current.

Assignments (14)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2025
From: MICROCHIP TECHNOLOGY INC.; MICROCHIP TECHNOLOGY IRELAND LIMITED; MICROSEMI CORPORATION; ATMEL CORPORATION; SILICON STORAGE TECHNOLOGY, INC.; MICROSEMI FREQUENCY AND TIME CORP.; MICROSEMI SEMICONDUCTOR ULC; MICROCHIP TECHNOLOGY GERMANY GMBH
To: CRESTONE IP MANAGEMENT, LLC
Reel/Frame 071991/0419 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2020
From: YEOM, HYUNSOO; XU, CHENG
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 054580/0893 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
Continuity (2)
Provisional Application 62671962 · May 15, 2018
Related Publication 20190353532A1 · Nov 21, 2019