IP Library Granted Patent US 10,466,765
Granted Patent B2
US 10,466,765 · App. 15/682,746 · Granted Nov 5, 2019

Systems and methods for managing power consumed by a microcontroller in an inactive mode

Inventors: Sebastien Jouin (La Chapelle Launay, FR); Patrice Menard (Saint Mars du Désert, FR); Thierry Gourbilleau (Le Loroux Bottereau, FR); Mikael Tual (Campbon, FR); Thibault Kervaon (Carquefou, FR); Bernard Coloma (Nantes, FR)
Assignee: MICROCHIP TECHNOLOGY INCORPORATED
G06F1/3243G06F1/3206G06F1/3293
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Quick Facts
Patent No.
US 10,466,765
App. No.
15/682,746
Granted
Nov 5, 2019
Kind
B2
Abstract

Embodiments of the present disclosure include a power management unit for controlling power in a microcontroller. The unit causes a first voltage to be provided in an active mode. In a sleep mode, the unit determines whether a supply voltage is less than an upper reference voltage and, if so, cause a second voltage greater than the first voltage to be provided. If not, the unit inhibits operation of voltage regulation of power supplied to the microcontroller. After inhibition of operation of voltage regulation, the unit determines whether the supply voltage has fallen to a lower reference voltage and, if so, applies the second voltage to the microcontroller.

Claims (62)

1. A microcontroller operable in an active mode and a sleep mode and comprising:

a voltage supply line connectable to ground via an external decoupling capacitor;

a voltage regulator circuit coupled to the voltage supply line and configured to apply to the voltage supply line one of a first voltage and a second voltage greater than the first voltage;

a voltage monitor circuit coupled to the voltage supply line and configured to:

compare a supply voltage on the voltage supply line to a third voltage that is greater than the first voltage, to produce a first signal; and

compare the supply voltage to a fourth voltage that is less than the first voltage, to produce a second signal;

a power management unit circuit electrically connected to the voltage regulator circuit and to the voltage monitor circuit and configured to:

determine whether the microcontroller is in the active mode or the sleep mode;

responsive to a determination that the microcontroller is in the active mode, cause the voltage regulator circuit to apply the first voltage to the voltage supply line;

responsive to a determination that the microcontroller is in the sleep mode:

determine from the first signal whether the supply voltage is less than the third voltage;

responsive to a determination that the supply voltage is less than the third voltage, cause the voltage regulator circuit to apply the second voltage to the voltage supply line; and

responsive to a determination that the supply voltage is not less than the third voltage, inhibit operation of the voltage regulator circuit at a first time;

subsequent to the first time, determine from the second signal whether the supply voltage has fallen to the fourth voltage; and

responsive to a determination that the supply voltage has fallen to the fourth voltage, cause the voltage regulator circuit to apply the second voltage to the voltage supply line at a second time; and

circuits configured to output control signals from the microcontroller to one or more devices electrically connected to the microcontroller, the circuits configured to draw power from the voltage supply line and the decoupling capacitor for a time period between the first time and the second time.

2. The microcontroller of claim 1 , wherein the second voltage and the third voltage are approximately equal.

3. The microcontroller of claim 1 , wherein the circuits require a minimum voltage during the sleep mode, and the fourth voltage is greater than the minimum voltage.

4. The microcontroller of claim 1 , wherein the power management unit circuit is further configured to:

inhibit operation of the voltage monitor circuit at the first time; and

cause the voltage monitor circuit to operate at regular intervals between the first time and the second time, wherein the intervals between operations of the voltage monitor circuit correspond to a predetermined period of time.

5. The microcontroller of claim 4 , further comprising a counter that is configured to store a value corresponding to total time elapsed between the first time and the second time, wherein the power management unit circuit is further configured to:

calculate a second period of time based on the value, wherein the second period of time is different than the predetermined period of time.

6. A method for managing a microcontroller operable in an active mode and a sleep mode, the method comprising:

determining whether the microcontroller is in the active mode or the sleep mode;

responsive to a determination that the microcontroller is in the active mode, causing a first voltage to be supplied by a voltage regulator circuit to a voltage supply line connected to ground via an external decoupling capacitor;

responsive to a determination that the microcontroller is in the sleep mode, causing a second voltage greater than the first voltage to be supplied by the voltage regulator circuit to the voltage supply line;

comparing, by a voltage monitor circuit coupled to the voltage supply line, a supply voltage on the voltage supply line to a third voltage that is greater than the first voltage;

determining, based on the comparison of the supply voltage to the third voltage, whether the supply voltage is less than the third voltage;

responsive to a determination that the supply voltage is less than the third voltage, causing the second to be supplied to the voltage supply line; and

responsive to a determination that the supply voltage is not less than the third voltage, inhibiting operation of the voltage regulator circuit at a first time;

subsequent to the first time, comparing, by the voltage monitor circuit, the supply voltage on the voltage supply line to a fourth voltage that is less than the first voltage;

determining, based on the comparison of the supply voltage to the fourth voltage, whether the supply voltage has fallen to the fourth voltage; and

responsive to a determination that the supply voltage has fallen to the fourth voltage, causing the second voltage to be supplied by the voltage regulator circuit to the voltage supply line at a second time; and

providing power, during a time period between the first time and the second time, from the voltage supply line and the decoupling capacitor to circuits that output control signals from the microcontroller to one or more devices electrically connected to the microcontroller.

7. The method of claim 6 , wherein the second voltage and the third voltage are approximately equal.

8. The method of claim 6 , wherein the circuits require a minimum voltage during the sleep mode, and the fourth voltage is greater than the minimum voltage.

9. The method of claim 6 , further comprising:

inhibiting operation of the voltage monitor circuit at the first time; and

causing the voltage monitor circuit to operate at regular intervals between the first time and the second time, wherein the intervals between operations of the voltage monitor circuit correspond to a predetermined period of time.

10. The method of claim 9 , further comprising:

generating, using a counter, a value corresponding to total time elapsed between the first time and the second time; and

calculating a second period of time based on the value, wherein the second period of time is different than the predetermined period of time.

11. A power management unit (PMU) for controlling power in a microcontroller, comprising circuitry configured to:

determine whether the microcontroller is in an active mode or a sleep mode;

based on a determination that the microcontroller is in the active mode, cause a first voltage to be provided to the microcontroller;

based on a determination that the microcontroller is the sleep mode:

determine whether a supply voltage of the microcontroller is less than an upper reference voltage;

based on a determination that the supply voltage is less than the upper reference voltage, cause a second voltage to be provided to the microcontroller, the second voltage greater than the first voltage;

based on a determination that the supply voltage is greater than or equal to the upper reference voltage, inhibit operation of voltage regulation of power supplied to the microcontroller;

after inhibition of operation of voltage regulation, determine whether the supply voltage has fallen to a lower reference voltage; and

based on a determination that the supply voltage has fallen to the lower reference voltage, apply the second voltage to the microcontroller.

12. The PMU of claim 11 , further comprising a connection to an external decoupling capacitor.

13. The PMU of claim 11 , further comprising circuitry configured to connect to a voltage regulator, the circuitry to provide the power to the microcontroller.

14. The PMU of claim 11 , further comprising circuitry configured to connect to a voltage monitor, the circuitry to receive indications of statuses of the supply voltage.

15. The PMU of claim 11 , further comprising circuitry to provide power to output circuits of the microcontroller from power from an external decoupling capacitor after inhibition of voltage regulation.

16. The PMU of claim 11 , wherein the second voltage and the upper reference voltage are approximately equal.

17. The PMU of claim 11 , wherein output circuits of the microcontroller require a minimum voltage during the sleep mode, and the lower reference voltage is greater than the minimum voltage.

18. The PMU of claim 11 , further comprising circuitry to alternately and periodically inhibit and enable voltage monitoring after voltage regulation is inhibited.

19. The PMU of claim 18 , further comprising:

a counter configured to store a value corresponding to total time elapsed after voltage regulation is inhibited until the determination that the supply voltage has fallen to the lower reference voltage and the second voltage is provided;

circuitry configured to adjust a period of alternately inhibiting and enabling voltage monitoring based upon the value.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2018
From: JOUIN, SEBASTIEN; MENARD, PATRICE; GOURBILLEAU, THIERRY; TUAL, MIKAEL; KERVAON, THIBAULT; COLOMA, BERNARD
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 047536/0396 →
Continuity (1)
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