Digital control of switched boundary mode power converter without current sensor
A circuit arrangement for switched boundary mode power conversion, a corresponding signal processor and a method of switched boundary mode power conversion are provided. The circuit arrangement comprises an input for receiving an input voltage from a power supply, an output to provide an output voltage to a load, an energy storage device, a controllable switching device, and a signal processor. The signal processor is connected to the controllable switching device and being configured for zero-current switching of the switching device, wherein the signal processor is further configured to determine at least one switching point for the zero-current switching from a first voltage signal and a second voltage signal, wherein the first voltage signal corresponds to the input voltage and the second voltage signal corresponds to the output voltage.
1. A circuit arrangement for switched boundary mode power conversion, comprising at least:
an input for receiving an input voltage from a power supply;
an output to provide an output voltage to a load;
an energy storage device;
a controllable switching device; and
a signal processor, connected to the controllable switching device and being configured for zero-current switching of the switching device; wherein
the signal processor is further configured to determine at least one switching point for the zero-current switching from a first voltage signal and a second voltage signal, wherein the first voltage signal corresponds to the input voltage and the second voltage signal corresponds to the output voltage; and wherein the signal processor comprises a delay module, configured so that the at least one switching point is delayed for a predetermined delay time after the energy storage device is completely discharged.
2. The circuit arrangement of claim 1 , wherein the signal processor during zero-current switching is configured to control the switching device at least at one zero-current point of the energy storage device.
3. The circuit arrangement of claim 2 , wherein the signal processor is configured to control the switching device from an off-state to an on-state at the at least one zero-current point.
4. The circuit arrangement of claim 1 , wherein the signal processor is configured to recurrently control the switching device at zero-current points.
5. The circuit arrangement of claim 1 , wherein the signal processor is configured for zero-current switching without current sensing.
6. The circuit arrangement of claims 1 , wherein the signal processor is further configured to determine output voltage reference information and to determine the at least one switching point from the first voltage signal, the second voltage signal, and the output voltage reference information.
7. The circuit arrangement claim 1 , wherein the signal processor comprises a PWM module for driving the switching device.
8. The circuit arrangement of claim 7 , wherein the signal processor further comprises a limiter, configured to provide maximum on-time information to the PWM module.
9. The circuit arrangement of claim 1 , wherein the signal processor is a digital signal processor comprising at least one analog-to-digital converter for converting at least one of the first or second voltage signal.
10. The circuit arrangement of claim 1 , wherein the signal processor is configured to sample at least one of the first voltage signal and the second voltage signal at a sampling time in each switching cycle, wherein the sampling time depends on the input voltage.
11. The circuit arrangement of claim 10 , wherein the signal processor is configured to set the sampling time to a mid-cycle time in case the input voltage is greater than half of the output voltage, which mid-cycle time is equally spaced between two subsequent zero-current points of the energy storage device.
12. The circuit arrangement of claim 10 , wherein the signal processor is configured to set the sampling time substantially to a zero-current point in case the input voltage corresponds to or is less than half of the output voltage.
13. The circuit arrangement of claim 1 , wherein the energy storage device is an inductor.
14. The circuit arrangement of claim 1 , wherein the switching device is a MOSFET.
15. The circuit arrangement of claim 1 , wherein the circuit arrangement is a boost converter.
16. The circuit arrangement of claim 1 , further comprising a rectifier circuit to rectify an AC input voltage.
17. A signal processor for use in a circuit arrangement for switched boundary mode power conversion with at least a controllable switching device, said signal processor being connectable to the controllable switching device and being configured for zero-current switching of the switching device; wherein the signal processor is further configured to determine at least one switching point for the zero-current switching from a first voltage signal and a second voltage signal, wherein the first voltage signal corresponds to an input voltage and the second voltage signal corresponds to an output voltage; and wherein the signal processor comprises a delay module, configured so that the at least one switching point is delayed for a predetermined delay time after the energy storage device is completely discharged.
18. A method of switched boundary mode power conversion with a circuit comprising an input for receiving an input voltage from a power supply; an output to provide an output voltage to a load; and a controllable switching device; wherein
at least one switching point for a zero-current control of the controllable switching device is determined from a first voltage signal and a second voltage signal, the first voltage signal corresponding to the input voltage and the second voltage signal corresponding to the output voltage; and wherein
the switching device is controlled according to the determined at least one zero-current control switching point; and wherein the at least one switching point is delayed for a predetermined delay time after the energy storage device is completely discharged.
19. A machine-readable medium including contents that are configured to cause a signal processor to conduct the method of claim 18 .