Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network
Numerous embodiments of a data refresh method and apparatus for use with a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. Various embodiments of a data drift detector suitable for detecting data drift in flash memory cells within the VMM array are disclosed.
1. A method of detecting data drift in fast cells in an analog neuromorphic memory system, the method comprising:
identifying fast cells in an array of non-volatile memory cells;
sampling the fast cells for data drift detection;
programming the fast cells to a target value for data drift detection; and
monitoring the sampled fast cells for data drift detection.
2. The method of claim 1 , wherein the monitoring step comprises:
sensing a first current drawn by a sampled fast cell during a read operation;
comparing the first current with a second current drawn by a reference circuit;
comparing the first current with a third current drawn by the reference circuit; and
when the first current exceeds the third current, refreshing data stored in a floating gate of the sampled fast cell until the sampled fast cell draws a restored current between the second and the third current during a read operation, and when the first current exceeds the second current and does not exceed the third current, refraining from refreshing the data.
3. The method of claim 2 , wherein the sampled fast cells are split gate flash memory cells.
4. The method of claim 2 , wherein the sampled fast cells are stacked gate flash memory cells.
5. The method of claim 1 , wherein the reference circuit comprises a current source.
6. The method of claim 5 , wherein the sampled fast cells are split gate flash memory cells.
7. The method of claim 5 , wherein the sampled fast cells are stacked gate flash memory cells.
8. The method of claim 1 , wherein the refreshing data is performed with a restored amount associated with a current level.
9. The method of claim 8 , wherein the sampled fast cells are split gate flash memory cells.
10. The method of claim 8 , wherein the sampled fast cells are stacked gate flash memory cells.
11. The method of claim 1 , wherein the refreshing data comprises re-transferring a training weight to the sampled fast cell.
12. The method of claim 11 , wherein the sampled the sampled fast cells are split gate flash memory cells.
13. The method of claim 11 , wherein the sampled fast cells are stacked gate flash memory cells.
14. The method of claim 1 , wherein the sampled fast cells are split gate flash memory cells.
15. The method of claim 1 , wherein the sampled fast cells are stacked gate flash memory cells.