IP Library Granted Patent US 10,511,275
Granted Patent B2
US 10,511,275 · App. 15/940,709 · Granted Dec 17, 2019

Common mode sensing architecture

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,511,275
App. No.
15/940,709
Granted
Dec 17, 2019
Kind
B2
Abstract

An amplifier includes a differential positive input, a differential negative input, and a transistor. The transistor is communicatively coupled to the differential positive input and differential negative input at a source of the transistor. The transistor is configured to track input common mode of the differential positive input and differential negative input.

Claims (76)

1. A common mode sensing amplifier, comprising:

a differential positive input;

a differential negative input;

a first transistor, wherein:

the first transistor is communicatively coupled to the differential positive input and differential negative input at a source of the first transistor; and

the first transistor is configured to track input common mode of the differential positive input and differential negative input; and

a resistive network, wherein:

a first end of the resistive network is configured to receive input from the differential positive input and a second end of the resistive network is configured to receive input from the differential negative input; and

the first transistor is coupled to the resistive network at a source of the first transistor.

2. The common mode sensing amplifier of claim 1 , wherein the first transistor is configured to generate a common mode output corresponding to the input common mode of the differential positive input and differential negative input.

3. The common mode sensing amplifier of claim 2 , wherein the common mode output is a bias current.

4. The common mode sensing amplifier of claim 1 , further comprising a plurality of cross-coupled current sources.

5. A common mode sensing amplifier, comprising:

a differential positive input;

a differential negative input;

a first transistor, wherein:

the first transistor is communicatively coupled to the differential positive input and differential negative input at a source of the first transistor; and

the first transistor is configured to track input common mode of the differential positive input and differential negative input; and

a plurality of cross-coupled current sources, wherein the cross-coupled current sources are configured to match current differential between the differential positive input and differential negative input.

6. The common mode sensing amplifier of claim 1 , wherein output voltage of the first transistor is equal to an average of voltages of the differential positive input and differential negative input.

7. The common mode sensing amplifier of claim 1 , further comprising:

a second transistor including a gate driven by the differential positive input and communicatively coupled to the first transistor; and

a third transistor including a gate driven by the differential negative input and communicatively coupled to the first transistor.

8. A system, comprising:

a resistive network;

an instrumentation amplifier;

a common mode output;

a differential positive input; and

a differential negative input;

wherein:

the differential positive input and the differential negative input are configured to receive a sensor signal;

the instrumentation amplifier includes a transconductance amplifier, the transconductance amplifier including a first transistor;

the first transistor is communicatively coupled to the differential positive input and differential negative input at a source of the first transistor;

the first transistor is configured to track input common mode of the differential positive input and differential negative input;

the instrumentation amplifier is configured to generate a bias signal from the input common mode on the common mode output for a signal source connected to the differential positive input and differential negative input;

a first end of the resistive network is configured to receive input from the differential positive input and a second end of the resistive network is configured to receive input from the differential negative input; and

the first transistor is coupled to the resistive network at a source of the first transistor.

9. The system of claim 8 , wherein the signal source is a shielded cable and the common mode output is configured to improve common mode rejection due to mismatched impedance of the shielded cable.

10. The system of claim 8 , wherein the first transistor is configured to generate the common mode output corresponding to the input common mode of the differential positive input and differential negative input.

11. The system of claim 10 , wherein the common mode output is a bias current.

12. The system of claim 8 , wherein the transconductance amplifier further comprises a plurality of cross-coupled current sources.

13. A system, comprising:

an instrumentation amplifier including a plurality of cross-coupled current sources;

a common mode output;

a differential positive input; and

a differential negative input;

wherein:

the differential positive input and the differential negative input are configured to receive a sensor signal;

the instrumentation amplifier includes a transconductance amplifier, the transconductance amplifier including a first transistor;

the first transistor is communicatively coupled to the differential positive input and differential negative input at a source of the first transistor;

the first transistor is configured to track input common mode of the differential positive input and differential negative input;

the instrumentation amplifier is configured to generate a bias signal from the input common mode on the common mode output for a signal source connected to the differential positive input and differential negative input; and

the cross-coupled current sources are configured to match current differential between the differential positive input and differential negative input.

14. The system of claim 8 , wherein output voltage of the first transistor is equal to an average of voltages of the differential positive input and differential negative input.

15. The system of claim 8 , wherein the transconductance amplifier further comprises:

a second transistor including a gate driven by the differential positive input and communicatively coupled to the first transistor; and

a third transistor including a gate driven by the differential negative input and communicatively coupled to the first transistor.

16. A method, comprising:

receiving, at a transconductance amplifier, a differential positive input;

receiving, at the transconductance amplifier, a differential negative input, wherein the differential positive input and differential negative input make up a sensor signal;

tracking, by a first transistor of the transconductance amplifier, input common mode of the differential positive input and differential negative input;

generating a bias signal from the input common mode on the common mode output for a signal source of the sensor signal;

receiving input from the differential positive input at a first end of a resistive network

receiving input from the differential negative input at a second end of the resistive network; and

applying output from the resistive network to a source of the first transistor.

17. The method of claim 16 , further comprising applying the bias signal to a shielded cable with mismatched impedance.

18. The method of claim 16 , further comprising generating the common mode output based on input common mode of the differential positive input and differential negative input.

19. The method of claim 16 , further comprising:

matching a current differential between the differential positive input and differential negative input; and

using the current differential to track the input common mode of the differential positive input and differential negative input.

20. A method, comprising:

receiving, at a transconductance amplifier, a differential positive input;

receiving, at the transconductance amplifier, a differential negative input, wherein the differential positive input and differential negative input make up a sensor signal;

tracking, by a first transistor of the transconductance amplifier, input common mode of the differential positive input and differential negative input;

generating a bias signal from the input common mode on the common mode output for a signal source of the sensor signal; and

using a plurality of cross-coupled current sources to match current differential between the differential positive input and differential negative input.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 2, 2018
From: WANG, DONG; NOLAN, JIM; BLAKE, KUMEN; RAI, MILAN
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 045818/0300 →