IP Library Granted Patent US 11,444,760
Granted Patent B2
US 11,444,760 · App. 15/984,213 · Granted Sep 13, 2022

System, method, and apparatus for obfuscating device operations

Inventor: Huiming Chen (Colorado Springs, CO)
Assignee: Microchip Technology Incorporated
H04L9/0869G06F7/588H04L9/003H04L9/005H04L9/14H04L2209/16
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Quick Facts
Patent No.
US 11,444,760
App. No.
15/984,213
Granted
Sep 13, 2022
Kind
B2
Abstract

The embodiments of the present disclosure relate generally to systems and methods for obfuscating the operation of a device, in particular, timing and power consumption information.

Claims (32)

1. A system comprising:

a first hardware processor to perform a cryptographic process to generate a private cryptographic key for one or more of encryption or decryption; and

a second hardware processor coupled to the first hardware processor, the second hardware processor to:

obtain one or more pre-calculated values of cryptographic parameters representing one or more inputs to a modular inverse calculation;

modify the one or more pre-calculated values of cryptographic parameters utilizing a randomly generated number;

initiate the cryptographic process by providing to the first hardware processor the modified one or more pre-calculated values of cryptographic parameters as an input of the cryptographic process; and

receive the generated private cryptographic key for one or more of encryption or decryption at least partially responsive to the first hardware processor executing the cryptographic process utilizing the modified one or more pre-calculated values of cryptographic parameters provided as the input of the cryptographic process.

2. The system of claim 1 , wherein the first hardware processor is arranged such that one or more characteristics exhibited substantially while executing the cryptographic process are externally observable, and wherein the one or more characteristics include at least one of power consumption, timing information, magnetic field information, heat signature information, or a combination or sub-combination thereof.

3. The system of claim 1 , wherein the cryptographic process includes calculating a greatest common divisor of two of the modified one or more pre-calculated values of cryptographic parameters.

4. The system of claim 1 , wherein the cryptographic process is a modular inverse calculation.

5. The system of claim 4 , wherein the modular inverse calculation includes an Extended Euclidean Greatest Common Divisor (XGCD) technique.

6. The system of claim 5 , wherein the XGCD technique includes a secure binary XGCD technique.

7. The system of claim 1 , comprising a random number generator.

8. The system of claim 1 , comprising: a memory to store the one or more pre-calculated values of cryptographic parameters.

9. The system of claim 1 , wherein the second hardware processor to:

further modify one or more pre-calculated values of cryptographic parameters utilizing a further randomly generated number; and

further initiate the cryptographic process by further providing to the first hardware processor the further modified one or more pre-calculated values of cryptographic parameters as a further input of the cryptographic process,

wherein the further modified one or more pre-calculated values of cryptographic parameters are different than the modified one or more pre-calculated values of cryptographic parameters.

10. The system of claim 9 , wherein the second hardware processor to:

receive the generated private cryptographic key for one or more of encryption or decryption at least partially responsive to the first hardware processor executing the cryptographic process utilizing the further modified one or more pre-calculated values of cryptographic parameters further provided as the further input of the cryptographic process.

11. A method comprising:

obtaining, at a second processor, one or more pre-calculated values of cryptographic parameters representing one or more inputs to a modular inverse calculation and having been modified utilizing a randomly generated number;

providing the one or more pre-calculated values of cryptographic parameters to a first processor as an input of a cryptographic process to initiate performance of the cryptographic process at the first processor; and

receiving a private cryptographic key for one or more of encryption or decryption at least partially responsive to the first processor executing the cryptographic process utilizing the input of one or more pre-calculated values of cryptographic parameters.

12. The method of claim 11 , wherein the cryptographic process includes calculating a greatest common divisor of two of the modified one or more pre-calculated values of cryptographic parameters.

13. The method of claim 11 , wherein the cryptographic process is a modular inverse calculation.

14. The method of claim 13 , wherein the modular inverse calculation includes an Extended Euclidean Greatest Common Divisor (XGCD) technique.

15. The method of claim 14 , wherein the XGCD technique includes a secure binary XGCD technique.

16. The method of claim 11 , comprising:

obtaining, at the second processor, one or more further pre-calculated values of cryptographic parameters representing one or more inputs to the modular inverse calculation and having been further modified utilizing a further randomly generated number;

providing the one or more further pre-calculated values of cryptographic parameters to the first processor as a further input of the cryptographic process to initiate performance of the cryptographic process at the first processor; and

receiving the private cryptographic key for one or more of encryption or decryption at least partially responsive to the first processor executing the cryptographic process utilizing the further input one or more further pre-calculated values of cryptographic parameters.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2019
From: CHEN, HUIMING
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 050938/0682 →