IP Library Granted Patent US 10,969,809
Granted Patent B2
US 10,969,809 · App. 16/527,488 · Granted Apr 6, 2021

Dual input LDO voltage regulator

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Quick Facts
Patent No.
US 10,969,809
App. No.
16/527,488
Granted
Apr 6, 2021
Kind
B2
Abstract

A low dropout (LDO) includes voltage inputs to receive input from voltage sources. The LDO voltage regulator includes a regulated voltage output, blocking diodes, and circuitry configured to block leakage from a first voltage input with a first blocking diode when the first voltage input is less than the regulated voltage output, and to provide the regulated voltage output from the first voltage input and a second voltage input.

Claims (92)

1. A low dropout (LDO) voltage regulator, comprising:

a first voltage input;

a second voltage input;

a regulated voltage output;

a first blocking diode;

a second blocking diode; and

circuitry configured to:

block leakage to the first voltage input with the first blocking diode when the first voltage input is less than the regulated voltage output; and

provide the regulated voltage output from the first voltage input and the second voltage input;

wherein the first blocking diode and the second blocking diode are implemented with active diodes.

2. The LDO voltage regulator of claim 1 , wherein the circuitry is further configured to block leakage to the second voltage input with the second blocking diode when the second voltage input is less than the regulated voltage output.

3. The LDO voltage regulator of claim 1 , further comprising a plurality of internal devices configured to be operated by the regulated voltage output.

4. The LDO voltage regulator of claim 1 , wherein:

a first control input of the first blocking diode is connected to an anode of the second blocking diode; and

a second control input of the second blocking diode is connected to an anode of the first blocking diode.

5. The LDO voltage regulator of claim 1 , wherein the first blocking diode and the second blocking diode are further implemented by transistors.

6. The LDO voltage regulator of claim 1 , wherein:

the first voltage input is connected to the first blocking diode through a first n-channel transistor;

the second voltage input is connected to the second blocking diode through a second n-channel transistor; and

the first and second n-channel transistors are configured to operate as voltage followers with respect to one another.

7. A low dropout (LDO) voltage regulator, comprising:

a first voltage input;

a second voltage input;

a regulated voltage output;

an output tank bypass capacitor connected within the LDO voltage regulator between the regulated voltage output and ground;

a first blocking diode;

a second blocking diode; and

circuitry configured to:

block leakage to the first voltage input with the first blocking diode when the first voltage input is less than the regulated voltage output; and

provide the regulated voltage output from the first voltage input and the second voltage input.

8. A microcontroller, comprising:

a first voltage source;

a second voltage source; and

a low-drop-out (LDO) voltage regulator, comprising:

a first voltage input configured to receive input from the first voltage source;

a second voltage input configured to receive input from the second voltage source;

a regulated voltage output;

a first blocking diode;

a second blocking diode; and

circuitry configured to:

block leakage to the first voltage input with the first blocking diode when the first voltage input is less than the regulated voltage output; and

provide the regulated voltage output from the first voltage input and the second voltage input;

wherein the first blocking diode and the second blocking diode are implemented with active diodes.

9. The microcontroller of claim 8 , wherein the circuitry is further configured to block leakage to the second voltage input with the second blocking diode when the second voltage input is less than the regulated voltage output.

10. The microcontroller of claim 8 , wherein the LDO further comprises a plurality of internal devices configured to be operated by the regulated voltage output.

11. The microcontroller of claim 8 , wherein:

a first control input of the first blocking diode is connected to an anode of the second blocking diode; and

a second control input of the second blocking diode is connected to an anode of the first blocking diode.

12. The microcontroller of claim 8 , wherein the first blocking diode and the second blocking diode are further implemented by transistors.

13. The microcontroller of claim 8 , wherein:

the first voltage input is connected to the first blocking diode through a first n-channel transistor;

the second voltage input is connected to the second blocking diode through a second n-channel transistor; and

the first and second n-channel transistors are configured to operate as voltage followers with respect to one another.

14. A microcontroller, comprising:

a first voltage source;

a second voltage source; and

a low-drop-out (LDO) voltage regulator, comprising:

a first voltage input configured to receive input from the first voltage source;

a second voltage input configured to receive input from the second voltage source;

a regulated voltage output;

a first blocking diode;

an output tank bypass capacitor connected within the LDO voltage regulator between the regulated voltage output and ground;

a second blocking diode; and

circuitry configured to:

block leakage to the first voltage input with the first blocking diode when the first voltage input is less than the regulated voltage output; and

provide the regulated voltage output from the first voltage input and the second voltage input.

15. A method, comprising, in a low-drop-out (LDO) voltage regulator:

at a first voltage input, receiving input from a first voltage source;

at a second voltage input, receiving input from a second voltage source;

providing a first blocking diode implemented as an active diode;

blocking leakage to the first voltage input from a regulated voltage output of the LDO regulator with the first blocking diode when the first voltage input is less than the regulated voltage output; and

providing the regulated voltage output from the first voltage input and the second voltage input.

16. The method of claim 15 , further comprising:

providing a second blocking diode implemented as an active diode; and

blocking leakage to the second voltage input from the regulated voltage output with the second blocking diode when the second voltage input is less than the regulated voltage output.

17. The method of claim 15 , further comprising providing the regulated voltage output to a plurality of internal devices of the LDO regulator.

18. The method of claim 15 , further comprising:

providing a second blocking diode;

connecting a first control input of the first blocking diode to an anode of the second blocking diode; and

connecting a second control input of the second blocking diode to an anode of the first blocking diode.

19. The method of claim 15 , further comprising providing transistors to implement the first blocking diode.

20. The method of claim 15 , further comprising:

providing a second blocking diode;

connecting the first voltage input to the first blocking diode through a first n-channel transistor;

connecting the second voltage input is connected to the second blocking diode through a second n-channel transistor; and

operating the first and second n-channel transistors as voltage followers with respect to one another.

21. A method, comprising, in a low-drop-out (LDO) voltage regulator:

at a first voltage input, receiving input from a first voltage source;

at a second voltage input, receiving input from a second voltage source;

blocking leakage to the first voltage input from a regulated voltage output of the LDO regulator with the first blocking diode when the first voltage input is less than the regulated voltage output;

providing the regulated voltage output from the first voltage input and the second voltage input; and

connecting an output tank within the LDO voltage regulator between the regulated voltage output and ground.

Assignments (12)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2019
From: DEVAL, PHILIPPE
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 049917/0347 →