IP Library Granted Patent US 11,397,702
Granted Patent B2
US 11,397,702 · App. 17/171,697 · Granted Jul 26, 2022

Interfacing a number of serial communication interfaces with a parallel communication interface, and related systems, methods, and apparatuses

Inventor: Johan Vaarlid (Trondelag, NO)
Assignee: Microchip Technology Incorporated
G06F13/4291G06F1/12G06F13/382
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,397,702
App. No.
17/171,697
Granted
Jul 26, 2022
Kind
B2
Abstract

Disclosed embodiments relate, generally, to interfacing serial communication interfaces of a first device with a parallel communication interface of a second device. A first group of two or more serial communication interfaces and an interfacing logic may be provided. The interfacing logic may form second encoded data blocks by arranging the data elements of the first encoded data blocks such that data elements within a same data element position of respective second encoded data blocks represent a given one of the symbols, and provide the second encoded data blocks to a number of serial communication interfaces coupled to a parallel communication interface of another device. An interfacing logic may additionally or alternatively be configured to receive, from a second group of two or more serial communication interfaces, received encoded data blocks representing received symbols.

Claims (36)

1. A method of interfacing at least two serial communication interfaces of a first device with a parallel communication interface of a second device, comprising:

obtaining symbols represented by first encoded data blocks having data elements arranged in a first order;

forming second encoded data blocks by arranging the data elements such that data elements within a same data element position of respective second encoded data blocks represent a given one of the symbols;

providing the second encoded data blocks to at least two serial communication interfaces coupled to a parallel communication interface of another device; and

sending the symbols, one symbol at a time, as represented by the second encoded data blocks.

2. The method of claim 1 , wherein sending the symbols comprises serially sending the second encoded data blocks.

3. The method of claim 1 , wherein sending the symbols comprises:

sending the data elements within a same data element position of the respective second encoded data blocks at substantially a same time.

4. The method of claim 1 , further comprising:

sending the data elements within the second encoded data blocks according to an order of the symbol to which respective data elements pertain.

5. The method of claim 1 , further comprising selecting a grouped serial communication interfaces comprising the at least two serial communication interfaces.

6. The method of claim 5 , further comprising synchronizing the serial communication interfaces of the grouped serial communication interfaces.

7. The method of claim 5 , further comprising coupling respective outputs of the grouped serial communication interfaces to individual inputs of the parallel communication interface of the second device.

8. The method of claim 1 , further comprising:

receiving, from grouped serial communication interfaces, received encoded data blocks representing received symbols;

arranging data elements of the received encoded data blocks into new encoded data blocks that respectively represent one of the received symbols; and

providing the new encoded data block to a parallel communication bus.

9. The method of claim 1 , further comprising:

setting up a parallel communication link using protocol symbols represented by pre-specified encoded data blocks having data elements pre-arranged in data element positions of the pre-specified encoded data blocks suitably for sending the protocol symbols using the at least two serial communication interfaces.

10. A computing device, comprising:

at least two serial communication interfaces; and

an interfacing logic to:

obtain symbols represented by first encoded data blocks having data elements arranged in a first order;

form second encoded data blocks by arranging the data elements of the first encoded data blocks such that data elements within a same data element position of respective second encoded data blocks represent a given one of the symbols;

provide the second encoded data blocks to at least two serial communication interfaces grouped for coupling to a parallel communication interface of another device; and

send the symbols, one symbol at a time, as represented by the second encoded data blocks.

11. The computing device of claim 10 , wherein the interfacing logic to select at least two serial communication interfaces.

12. The computing device of claim 10 , wherein the interfacing logic is provided at a parallel communication interface of the computing device.

13. The computing device of claim 10 , wherein the interfacing logic to provide a shared clock for synchronizing the sending of the symbols.

14. The computing device of claim 10 , wherein the interfacing logic to arrange data elements of received second encoded data blocks representing received symbols into new first encoded data blocks representing the received symbols, the received symbols received from the at least two serial communication interfaces grouped for coupling to the parallel communication interface.

15. The computing device of claim 10 , wherein the data elements of the second encoded data blocks are arranged according to the order of the symbol to which respective data elements of the second encoded data blocks pertain.

16. The computing device of claim 10 , further comprising protocol symbols represented by pre-specified encoded data blocks having data elements pre-arranged in data element positions of the pre-specified encoded data blocks suitably for sending the protocol symbols using the at least two serial communication interfaces.

17. A system comprising:

a first and a second devices; and

an interfacing logic to arrange data elements of first encoded data blocks, each of the first encoded data blocks representing a symbol, into second encoded data blocks such that data elements within a same data element position of respective second encoded data blocks represent a given one of the symbols, and provide the second encoded data blocks to a first group of serial communication interfaces of the first device coupled to a parallel communication interface of the second device.

18. The system of claim 17 , wherein the interfacing logic to receive, from a second group of serial communication interfaces, received encoded data blocks representing received symbols and arranged data elements of the received encoded data blocks into new encoded data blocks representing the received symbols.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059357/0823 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059358/0398 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059264/0384 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 058214/0380 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0238 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058213/0959 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2021
From: VAARLID, JOHAN
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 057690/0775 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
Continuity (2)
Provisional Application 62984086 · Mar 2, 2020
Related Publication 20210271627A1 · Sep 2, 2021