IP Library Granted Patent US 10,418,438
Granted Patent B2
US 10,418,438 · App. 15/885,948 · Granted Sep 17, 2019

Capacitor structure with an extended dielectric layer and method of forming a capacitor structure

Inventors: Randy Yach (Phoenix, AZ); Rohan Braithwaite (Gilbert, AZ)
Assignee: MICROCHIP TECHNOLOGY INCORPORATED
H01L28/60H01G4/10H01G4/1272H01G4/33H01L29/94H01L28/40
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Quick Facts
Patent No.
US 10,418,438
App. No.
15/885,948
Granted
Sep 17, 2019
Kind
B2
Abstract

A capacitor structure may include a lower conducting layer (e.g., poly 1 layer) and an upper conducting layer (e.g., overlying poly 2 layer), which define an anode and cathode, and a dielectric layer (e.g., an ONO layer stack) located between the upper conducting layer and the lower conducting layer, wherein a portion of the dielectric layer (e.g., at least the nitride layer of the ONO layer stack) extends beyond a lateral edge of the upper conducting layer. A method forming such capacitor structure may utilize a spacer adjacent the lateral edge of the upper conducting layer and over the first portion of the dielectric layer, performing an etch to remove a first portion of the dielectric layer but protect a second portion located below the spacer and extending laterally beyond an edge of the upper conducting layer.

Claims (27)

1. A capacitor structure, comprising:

an upper conducting layer;

a lower conducting layer;

an oxide-nitride-oxide (ONO) structure located between the upper conducting layer and the lower conducting layer, the ONO structure including a lower oxide layer, a nitride dielectric layer, and an upper oxide layer;

wherein a portion of the nitride dielectric layer extends beyond a lateral edge of the upper conducting layer; and

a spacer adjacent the lateral edge of the upper conducting layer and covering the portion of the nitride dielectric extending beyond the lateral edge of the upper conducting layer;

wherein the spacer comprises a different oxide than the upper oxide layer of the ONO structure.

2. The capacitor structure of claim 1 , wherein the upper oxide layer of the ONO structure does not extend beyond the lateral edge of the upper conducting layer.

3. The capacitor structure of claim 1 , wherein a portion of the lower oxide layer of the ONO structure below the portion of the nitride dielectric layer extends beyond the lateral edge of the upper conducting layer.

4. The capacitor structure of claim 1 , wherein:

a terminal edge of the nitride dielectric layer extends beyond the lateral edge of the upper conducting layer in a first direction; and

the lower conducting layer extends beyond the terminal edge of the nitride dielectric layer in the first direction.

5. The capacitor structure of claim 1 , wherein the upper conducting layer and the lower conducting layer comprise polysilicon.

6. The capacitor structure of claim 1 , wherein the lower conducting layer comprises a poly 1 layer, and the upper conducting layer comprises a poly 2 layer.

7. A capacitor structure, comprising:

an upper conducting layer;

a lower conducting layer;

an oxide-nitride-oxide (ONO) structure located between the upper conducting layer and the lower conducting layer, the ONO structure including a lower oxide layer, a nitride dielectric layer, and an upper oxide layer;

wherein a lateral edge of the nitride dielectric layer extends beyond an outer lateral edge of the upper conducting layer, such that the upper conducting layer does not overlie the lateral edge of the nitride dielectric layer; and

a spacer adjacent and in contact with the outer lateral edge of the upper conducting layer and covering a lateral end region of the nitride dielectric that extends laterally from the outer lateral edge of the upper conducting layer to the lateral edge of the nitride dielectric layer.

8. The capacitor structure of claim 7 , wherein the spacer comprises an oxide layer.

9. The capacitor structure of claim 7 , wherein the spacer comprises a different oxide than the upper oxide layer of the ONO structure.

10. The capacitor structure of claim 7 , wherein the upper oxide layer of the ONO structure does not extend beyond the lateral edge of the upper conducting layer.

11. The capacitor structure of claim 7 , wherein a portion of the lower oxide layer of the ONO structure below the lateral end region of the nitride dielectric layer extends beyond the lateral edge of the upper conducting layer.

12. The capacitor structure of claim 7 , wherein:

the lateral end region of the nitride dielectric layer extends beyond the lateral edge of the upper conducting layer in a first direction; and

the lower conducting layer extends beyond the lateral end region of the nitride dielectric layer in the first direction.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2018
From: YACH, RANDY; BRAITHWAITE, ROHAN
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 044795/0826 →
Continuity (2)
Provisional Application 62456764 · Feb 9, 2017
Related Publication 20180226469A1 · Aug 9, 2018