Precise data tuning method and apparatus for analog neural memory in an artificial neural network
Numerous embodiments of a precision programming algorithm and apparatus are disclosed for precisely and quickly depositing the correct amount of charge on the floating gate of a non-volatile memory cell within a vector-by-matrix multiplication (VMM) array in an artificial neural network. Selected cells thereby can be programmed with extreme precision to hold one of N different values.
1. A method of tuning a differential pair of selected non-volatile memory cells in a vector-by-matrix multiplication array of non-volatile memory cells, the method comprising:
(i) setting a first initial current target for a first selected non-volatile memory cell to store a w+ value and a second initial current target for a second selected non-volatile memory cell to store a w− value;
(ii) performing a soft erase on all non-volatile memory cells in the vector-by-matrix multiplication array;
(iii) performing a coarse programming operation on the first selected memory cell and the second selected memory cell;
(iv) performing a fine programming operation on the first selected memory cell and the second selected memory cell;
(v) performing a read operation on the first selected memory cell and the second selected memory cell and determining a combined weight w drawn by the first selected memory cell and the second selected memory cell during the read operation according to a formula w=(w+)−(w−);
(vi) calculating an output error based on a difference between w and a difference between the first initial current target and the second initial current target; and
repeating steps (i), (ii), (iii), (iv), (v), and (vi) until the output error is less than a predetermined threshold.
2. The method of claim 1 , wherein the first initial current target and the second initial current target are derived using a mathematical function.
3. The method of claim 1 , wherein the first initial current target and the second initial current target are derived from a look-up table.
4. A method of tuning a differential pair of selected non-volatile memory cells in a vector-by-matrix multiplication array of non-volatile memory cells, the method comprising:
(i) setting a first initial target for a first selected non-volatile memory cell to store a w+ value and a second initial target for a second selected non-volatile memory cell to store a w− value;
(ii) performing a programming operation on the first selected memory cell and the second selected memory cell;
(iii) performing a read operation on the first selected memory cell and the second selected memory cell and determining a combined weight w drawn by the first selected memory cell and the second selected memory cell during the read operation according to a formula w=(w+)−(w−);
(iv) calculating an output error based on a difference between w and a difference between the first initial target and the second initial target; and
(v) repeating steps (i), (ii), (iii), and (iv) until the output error is less than a predetermined threshold.
5. The method of claim 4 , further comprising: reading a current drawn by the first selected non-volatile memory cell and a current drawn by the second selected non-volatile memory cell.
6. The method of claim 4 , further comprising: performing a soft erase operation.
7. The method of claim 4 , further comprising: performing a coarse programming-verify cycle on the first selected non-volatile memory cell and the second selected non-volatile memory cell.
8. The method of claim 4 , further comprising: performing a fine programming-verify cycle on the first selected non-volatile memory cell and the second selected non-volatile memory cell.
9. The method of claim 4 , wherein the first selected non-volatile memory cell and the second selected non-volatile memory cell are programmed using Fowler-Nordheim tunneling.
10. The method of claim 4 , wherein the first selected non-volatile memory cell and the selected non-volatile memory cell are programmed using source side injection.
11. The method of claim 4 , further comprising:
performing a sector erase; and
performing steps (i), (ii), (iii), and (iv) for the sector.
12. The method of claim 4 , wherein the programming operation for the first selected non-volatile memory cell or the second selected non-volatile memory cell overshoots the first initial target or the second initial target respectively and a new target is calculated based on the overshoot.
13. The method of claim 4 , wherein the programming operation of the first selected non-volatile memory cell or the second selected non-volatile memory cell undershoots the first initial target or the second initial target respectively and a new target is calculated based on the undershoot.