IP Library Granted Patent US 10,476,712
Granted Patent B2
US 10,476,712 · App. 15/974,317 · Granted Nov 12, 2019

Accelerating antenna ramp-down and related systems

Inventors: Werner Blatz (Leingarten, DE); Thomas Janz (Ulm, DE); Robert Dvorszky (Deutschland, DE)
Assignee: Microchip Technology Incorporated
H04L25/4902B60R25/245H04B17/101H04L25/0384B60R2325/10
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Quick Facts
Patent No.
US 10,476,712
App. No.
15/974,317
Granted
Nov 12, 2019
Kind
B2
Abstract

Various embodiments relate to accelerating ramp-down of a modulated signal. In one embodiment, an antenna driver signal is defined and asserted to accelerate ramp-down. The accelerating ramp-down driver signal may include a series of sinusoidal-like pulses asserted at a driver output. The sinusoidal-like pulse may be synchronized by phase to a declining antenna current. Signal properties—such as phase, amplitude, delay, shape and frequency—of the sinusoidal-like pulse may be adopted to affect the ramp-down of the modulated signal.

Claims (65)

1. An accelerating ramp-down method, comprising:

asserting, at a driver output coupled to an antenna, a first signal pulse with first defined signal properties, wherein the first defined signal properties include one or more of an amplitude, a phase, a frequency, a prior delay time, and a pulse shape;

observing a phase information of an antenna signal, wherein the antenna signal is observed from an antenna current or an antenna voltage;

asserting, at the driver output coupled to the antenna, successive signal pulses having different defined signal properties, wherein at least some of the different defined signal properties are based on the phase information of the antenna signal;

detecting a stop condition based on the antenna signal; and

asserting, at the driver output coupled to the antenna, a stop signal responsive to the stop condition.

2. The method of claim 1 , wherein detecting the stop condition based on the observed antenna signal comprises observing that an observed antenna signal level is equal to or less than an antenna signal threshold.

3. The method of claim 1 , wherein detecting the stop condition based on the observed antenna signal comprises observing a time period of an antenna signal outside an antenna signal range.

4. The method of claim 1 , further comprising:

observing one or more signal properties of the antenna signal and defining the successive signal pulses based on at least one of the one or more signal properties just before or during an antenna ramp-down, wherein the one or more signal properties of the antenna signal comprises a phase and an amplitude.

5. The method of claim 4 , further comprising, between a first signal pulse of the successive signal pulses and a second signal pulse of the successive signal pulses:

asserting a synchronization signal;

observing the phase of the antenna signal;

detecting a synchronization condition; and

asserting the second signal pulse of the successive signal pulses responsive to detecting the synchronization condition.

6. The method of claim 4 , further comprising:

detecting a first condition associated with a frequency of the antenna signal;

asserting a first signal pulse of the successive signal pulses at a first frequency responsive to the first condition;

detecting a second condition associated with the frequency of the antenna signal; and

asserting a second signal pulse of the successive signal pulses at a second frequency responsive to the second condition.

7. The method of claim 6 , wherein the first frequency and the second frequency are selected to maximize the ramp-down of the antenna during the first signal pulse of the successive signal pulses and the second signal pulse of the successive signal pulses, respectively.

8. The method of claim 7 , further comprising measuring the phase of the antenna signal by observing the antenna signal cross a synchronization threshold.

9. The method of claim 4 , further comprising:

observing the antenna signal;

detecting a slow-down condition; and

defining an amplitude of at least one pulse of the successive signal pulses responsive to the slow-down condition.

10. The method of claim 9 , wherein the slow-down condition is selected to ensure a reliable detection of the stop condition.

11. The method of claim 1 , further comprising defining a signal pulse shape of the successive signal pulses, wherein the signal pulse shape is configured to effect a ramp-down of an antenna current while an electromagnetic interference emission is low.

12. The method of claim 11 , wherein the signal pulse shape begins and ends with a zero slope.

13. An integrated circuit comprising a configurable state machine and an antenna driver, wherein the configurable state machine is configured to control the antenna driver to:

assert a first signal pulse with first defined signal properties, wherein the first defined signal properties include one or more of an amplitude, a phase, a frequency, a prior delay time, and a pulse shape;

assert successive signal pulses having different defined signal properties, wherein at least some of the different defined signal properties are based on phase information of an antenna signal; and

assert a stop signal responsive to a stop condition,

wherein the configurable state machine is further configured to:

observe phase information of the antenna signal, wherein the antenna signal is observed from an antenna current or an antenna voltage; and

detect the stop condition responsive to the antenna signal.

14. The integrated circuit of claim 13 , wherein the configurable state machine is configured to detect the stop condition responsive to an observed antenna signal level equal to or less than an antenna signal threshold.

15. The integrated circuit of claim 13 , wherein the configurable state machine is configured to observe one or more signal properties of the antenna signal and operably control the antenna driver to define successive signal pulses responsive to at least one of the one or more signal properties just before or during an antenna ramp-down, wherein the one or more signal properties of the antenna signal comprises a phase and an amplitude.

16. The integrated circuit of claim 15 , wherein the configurable state machine is configured to operably control the antenna driver to, between a first signal pulse of the successive signal pulses and a second signal pulse of the successive signal pulses:

assert a synchronization signal;

observe the phase of the antenna signal;

detect a synchronization condition; and

assert the second signal pulse of the successive signal pulses responsive to detecting the synchronization condition.

17. The integrated circuit of claim 15 , wherein the configurable state machine is configured to detect a first condition associated with a frequency of the antenna signal and detect a second condition associated with the frequency of the antenna signal, wherein the configurable state machine is configured to control the antenna driver to:

assert a first signal pulse of the successive signal pulses at a first frequency responsive to the first condition; and

assert a second signal pulse of the successive signal pulses at a second frequency responsive to the second condition.

18. The integrated circuit of claim 17 , wherein the first frequency and the second frequency are selected to maximize antenna ramp-down during the first signal pulse of the successive signal pulses and the second signal pulse of the successive signal pulses, respectively.

19. The integrated circuit of claim 17 , wherein the configurable state machine is configured to measure the phase of the antenna signal by observing the antenna signal cross a synchronization threshold.

20. The integrated circuit of claim 15 , wherein the configurable state machine is configured to:

observe the antenna signal;

detect a slow-down condition; and

define an amplitude of at least one pulse of the successive signal pulses responsive to the slow-down condition.

21. The integrated circuit of claim 20 , wherein the slow-down condition is selected to ensure a reliable detection of the stop condition.

22. The integrated circuit of claim 13 , wherein the configurable state machine is configured to define a signal pulse shape of the successive signal pulses, wherein the signal pulse shape is configured to effect a ramp-down of an antenna current while an electromagnetic interference emission is low.

23. The integrated circuit of claim 22 , wherein the signal pulse shape begins and ends with a zero slope.

24. A system, comprising:

a low frequency antenna; and

a radiofrequency (RF) device operably coupled to the antenna, wherein the RF device is configured to control the low frequency antenna to emit a modulated carrier wave that during at least one operational mode exhibits a shorter ramp-down period than a resonant ramp-down of the low frequency antenna.

25. The system of claim 24 , wherein the RF device comprises a processor and an antenna driver, the antenna driver having at least one interface configured to be operably coupled to the low frequency antenna.

26. The system of claim 25 , wherein the processor is configured to control the antenna driver during the at least one operational mode to:

assert a first signal pulse with first defined signal properties, wherein the first defined signal properties include one or more of amplitude, phase, frequency, prior delay time, and pulse shape; and

assert successive signal pulses having different defined signal properties, wherein at least some of the different defined signal properties are based on phase information of an antenna signal.

27. The system of claim 24 , wherein the RF device is configured to provide a driver signal to the low frequency antenna that is between about 100 kHz and 150 kHz.

28. The system of claim 24 , further comprising an integrated circuit package, wherein the integrated circuit package comprises the RF device.

29. The system of claim 28 , further comprising a printed circuit board, the printed circuit board comprising the integrated circuit package and the low frequency antenna.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2018
From: BLATZ, WERNER; JANZ, THOMAS; DVORSZKY, ROBERT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 045746/0811 →
Continuity (2)
Provisional Application 62598917 · Dec 14, 2017
Related Publication 20190190749A1 · Jun 20, 2019