Ethernet interface and related systems, methods and devices
Disclosed embodiments relate, generally, to improved data reception handling at a physical layer (PHY). Some embodiments relate to end of line systems that include legacy media access control (MAC) and PHY that implement improved data reception handling disclosed herein. The improved data reception handling improves the operation of the end of line systems, and the MAC more specifically, and in some cases to comply with media access tuning protocols implemented at the physical layer.
1. A system, comprising:
a physical layer side receive datapath circuitry to move receive data toward a link layer side receive datapath circuitry, the physical layer side receive datapath circuitry comprising:
a first portion coupled to operate according to a first clock domain;
a second portion coupled to operate according to a second clock domain; and
a transition boundary where receive data moved via the physical layer side receive datapath circuitry crosses from the second clock domain to the first clock domain; and
a physical layer side transmit datapath circuitry to move transmit data toward a shared transmission medium,
wherein the physical layer side transmit datapath circuitry coupled to move transmit data toward the shared transmission medium according to the first clock domain.
2. The system of claim 1 , further comprising a control datapath.
3. The system of claim 2 , wherein the control datapath to move control data to or from a physical layer of the system.
4. The system of claim 3 , wherein the control datapath to move the control data between the physical layer of the system and an application layer of a network protocol stack.
5. The system of claim 3 , wherein the control datapath to move the control data between the physical layer of the system and a device that is separate from a network protocol stack.
6. The system of claim 3 , wherein the control datapath may be used for one or more control cycles that comprise moving control data to or from the physical layer.
7. The system of claim 6 , wherein one of the one or more control cycles is associated with one of a time aware protocol, a traffic shaping protocol, and a physical layer collision avoidance protocol.
8. A circuitry of a physical layer device, comprising:
a local clock generator to generate a local clock;
a transmit circuitry and a first portion of a receive circuitry, wherein each of the transmit circuitry and the first portion of the receive circuitry are operatively coupled to an output of the local clock generator and are clocked by the local clock, wherein the transmit circuitry to move transmit data toward a shared transmission medium based on the local clock;
a second portion of a receive circuitry coupled to operate according to a remote clock; and
one or more outputs, wherein the one or more outputs comprise a first output operatively coupled to the clock generator to propagate the local clock.
9. The circuitry of claim 8 , further comprising an interconnect, the interconnect to operably couple the first output to a receive clock input of a link layer device and to a transmit clock input of the link layer device.
10. The circuitry of claim 8 , wherein the one or more outputs comprise a second output, the second output assigned to a signal for exclusive collision signaling.
11. The circuitry of claim 8 , further comprising one or more inputs, wherein the one or more inputs comprise a first input operatively coupled to the transmit circuitry, wherein the first input is assigned to a signal for control signaling.
12. The circuitry of claim 11 , further comprising an interconnect, the interconnect to operably couple the first input to one or more devices above a link layer of a network protocol stack.
13. The circuitry of claim 12 , further comprising interface circuitry for operable coupling to the shared transmission medium.
14. The circuitry of claim 13 , wherein one of the one or more devices is a time syncing circuit.
15. The circuitry of claim 8 , wherein at least one output of the one or more outputs for exclusive collision signaling.
16. The circuitry of claim 15 , further comprising an interconnect, the interconnect is to operatively couple the at least one output for exclusive collision signaling to an input of a link layer device for exclusive collision signaling.
17. The circuitry of claim 8 , further comprising a reference clock generator to generate a local reference clock.
18. The circuitry of claim 17 , wherein the local clock generator to generate the local clock responsive to the local reference clock.
19. The circuitry of claim 17 , wherein the receive circuitry comprises:
an oversampling circuit to receive the local reference clock; and
a synchronization circuit to receive the local clock.
20. A method, comprising:
starting a data reception from a shared transmission medium; and
moving receive data toward an interface for operative coupling to a link layer, wherein the moving the receive data comprises crossing the receive data from a remote clock domain to a local clock domain of a physical layer device, the link layer coupled to operate on the local clock domain of the physical layer device.
21. The method of claim 20 , wherein the moving the receive data further comprises:
oversampling data received from the shared transmission medium.
22. The method of claim 21 , wherein the moving the receive data further comprises:
performing digital clock and data recovery using the oversampled data.
23. The method of claim 22 , further comprising:
providing the receive data to the interface for sending to the link layer.