An apparatus includes a display stack and a controller. The display stack includes a display and a ground layer. The ground layer includes a plurality of columns. Each column of the plurality of columns includes a plurality of nodes. The controller provides voltages to a first plurality of nodes of a first column of the plurality of columns of the ground layer such that a sum of the voltages of the first plurality of nodes of the first column is less than or equal to two millivolts. The controller also measures values at a second plurality of nodes of a second column of the plurality of columns. The values at the second plurality of nodes indicates an amount of charge transferred from the first plurality of nodes to the second plurality of nodes.
1. An apparatus comprising:
a display stack comprising a display and a ground layer, the ground layer comprising a plurality of columns, each column of the plurality of columns comprising a plurality of nodes;
a controller coupled to the display stack, the controller configured to:
provide voltages to a first plurality of nodes of a first column of the plurality of columns of the ground layer such that a sum of the voltages of the first plurality of nodes of the first column is less than or equal to two millivolts; and
measure values at a second plurality of nodes of a second column of the plurality of columns, the values at the second plurality of nodes indicating an amount of charge transferred from the first plurality of nodes to the second plurality of nodes.
2. The apparatus of claim 1 , the controller further configured to:
provide, at a point in time, a voltage to a gate line of the display stack to update the display; and
not provide, at the point in time, a voltage to a node that overlaps the gate line.
3. The apparatus of claim 1 , wherein each node of the first plurality of nodes is provided with a signal that is opposite in polarity from a signal driving an adjacent node of the first column.
4. The apparatus of claim 1 , the controller further configured to:
provide voltages to a third plurality of nodes such that a sum of the respective voltages of the third plurality of nodes is less than or equal to two millivolts; and
measure values at the first plurality of nodes, the values at the first plurality of nodes reflecting an amount of charge transferred from the third plurality of nodes to the first plurality of nodes.
5. The apparatus of claim 1 , further comprising a plurality of source lines, wherein:
the display comprises a plurality of pixels;
each source line of the plurality of source lines communicates a signal that controls a pixel of the plurality of pixels; and
the first plurality of nodes overlaps the plurality of source lines.
6. The apparatus of claim 1 , further comprising a plurality of sense lines, each sense line of the plurality of sense lines couples the controller to a node of the first plurality of nodes, each sense line couples to a different node of the first plurality of nodes than every other sense line of the plurality of sense lines.
7. The apparatus of claim 1 , wherein:
the display stack comprises a sense line layer, a gate line layer, and a source line layer; and
the gate line layer is positioned between the sense line layer and the source line layer.
8. A non-transitory computer-readable medium storing logic, the logic configured to, when executed by a processor, cause the processor to:
cause a display of a display stack to generate an image;
provide voltages to a first plurality of nodes of a first column of a plurality of columns of a ground layer of the display stack such that a sum of the respective voltages of the first plurality of nodes of the first column is less than or equal to two millivolts; and
measure values at a second plurality of nodes of a second column of the plurality of columns, the values at the second plurality of nodes indicating an amount of charge transferred from the first plurality of nodes to the second plurality of nodes.
9. The non-transitory computer-readable medium of claim 8 , the logic configured to, when executed by the processor, cause the processor to further:
provide, at a point in time, a voltage to a gate line of the display to update the image; and
not provide, at the point in time, a voltage to a node that overlaps the gate line.
10. The non-transitory computer-readable medium of claim 8 , wherein driving the first plurality of nodes comprises:
providing a first signal having a first polarity to a first node of the first plurality of nodes;
providing a second signal having a second polarity that is opposite in polarity to the first polarity to a second node adjacent to the first node.
11. The non-transitory computer-readable medium of claim 8 , the logic configured to, when executed by the processor, cause the processor to further:
provide voltages to a third plurality of nodes such that a sum of the respective voltages of the third plurality of nodes is less than or equal to two millivolts; and
measure values at the first plurality of nodes, the values at the first plurality of nodes reflecting an amount of charge transferred from the third plurality of nodes to the first plurality of nodes.
12. The non-transitory computer-readable medium of claim 8 , wherein causing the display to generate the image comprises communicating, through a plurality of source lines, respective signals that control respective pixels of the display.
13. The non-transitory computer-readable medium of claim 8 , the logic configured to, when executed by the processor, cause the processor to further determine that a touch event occurred in response to a determination that the measured values changed.
14. A device comprising:
one or more processors; and
one or more memory units coupled to the one or more processors, the one or more memory units collectively storing logic configured to, when executed by the one or more processors, cause the one or more processors to:
generate an image for a display of a display stack;
provide voltages to a first plurality of nodes of a first column of a plurality of columns of a ground layer of the display stack such that a sum of the voltages of the first plurality of nodes of the first column is less than or equal to two millivolts; and
measure values at a second plurality of nodes of a second column of the plurality of columns of the ground layer, the values at the second plurality of nodes indicating an amount of charge transferred from the first plurality of nodes to the second plurality of nodes.
15. The device of claim 14 , wherein the logic configured to, when executed by the processor, cause the processor to further:
provide, at a point in time, a voltage to a gate line of the display stack to update the display; and
not provide, at the point in time, a voltage to a node that overlaps the gate line.
16. The device of claim 14 , wherein each node of the first plurality of nodes is provided with a signal that is opposite in polarity from a signal driving an adjacent node of the first column.
17. The device of claim 14 , wherein the logic configured to, when executed by the processor, cause the processor to further:
provide voltages to a third plurality of nodes, such that a sum of the voltages of the third plurality of nodes is less than or equal to two millivolts; and
measure values at the first plurality of nodes, the values at the first plurality of nodes reflecting an amount of charge transferred from the third plurality of nodes to the first plurality of nodes.
18. The device of claim 14 , further comprising a plurality of source lines, wherein:
the display comprises a plurality of pixels;
each source line of the plurality of source lines communicates a signal that controls a pixel of the plurality of pixels; and
the first plurality of nodes overlaps the plurality of source line.
19. The device of claim 14 , further comprising a plurality of sense lines, each sense line of the plurality of sense lines couples the controller to a node of the first plurality of nodes, each sense line couples to a different node of the first plurality of nodes than every other sense line of the plurality of sense lines.
20. The device of claim 14 , wherein:
the display stack comprises a sense line layer, a gate line layer, and a source line layer; and
the gate line layer is positioned between the sense line layer and the source line layer.