IP Library Granted Patent US 11,811,410
Granted Patent B2
US 11,811,410 · App. 17/247,954 · Granted Nov 7, 2023

Sensors, autonomous sensors and related systems, methods and devices

Inventor: Amund Aune (Trondheim, NO)
Assignee: Microchip Technology Incorporated
H03K5/12H02M1/08H03K5/082
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Quick Facts
Patent No.
US 11,811,410
App. No.
17/247,954
Granted
Nov 7, 2023
Kind
B2
Abstract

Disclosed embodiments relate to sensing states and changes of states of a signal and sensors for the same, including but not limited to, autonomous sensors. Such sensor may include an analog signal threshold detection circuit, a state detection circuit, and a measurement circuit. The analog signal threshold detection circuit may be configured to alternately assert and de-assert a threshold detected indication in response to an input signal and a state thereof. The state detection circuit may be configured to generate a signal state indication about a state of the input signal. The measurement circuit may be configured to generate a measurement in response to assertions of the threshold detected indication and the signal state indication, such as a count, a slew rate, or a frequency. In some embodiments, disclosed sensors may have programmable thresholds for sensing the signal states and changes therein.

Claims (43)

1. A sensor, comprising:

a state detection circuit to generate a signal state indication about a state of an observed signal;

an analog signal threshold detection circuit to alternately assert and de-assert a threshold detected indication responsive to the observed signal and the signal state indication; and

a measurement circuit to generate a measurement responsive to assertions and de-assertions of the threshold detected indication and the signal state indication, wherein the measurement circuit comprises:

a start/stop logic to alternately generate a start signal or a stop signal responsive to the threshold detected indication and the signal state indication; and

a counter to increment a count during a time defined between a generated start signal and a generated stop signal.

2. The sensor of claim 1 , wherein the state detection circuit is to generate the signal state indication responsive to assertions and de-assertions of the threshold detection indication and a previous state of the observed signal.

3. The sensor of claim 1 , wherein the counter is to increment the count responsive to a countable element, the countable element including one of: a clock cycle, a rising edge of a clock, or a falling edge of a clock.

4. The sensor of claim 1 , wherein the measurement is one of the count, a slew rate, or a frequency.

5. The sensor of claim 1 , wherein the measurement circuit comprises a rising or falling edge indicator.

6. The sensor of claim 1 , further comprising an upper signal threshold register and a lower signal threshold register.

7. The sensor of claim 6 , wherein the upper and lower signal threshold registers are respectively coupled to the analog signal threshold detection circuit.

8. The sensor of claim 1 , further comprising a measurement register.

9. The sensor of claim 8 , wherein the measurement register is coupled to the measurement circuit.

10. A method, comprising:

selecting a first reference signal responsive to an indicated signal state of an observed signal being a first signal state;

observing a first relationship between a signal level of the observed signal and a signal level of the first reference signal;

setting the indicated signal state of the observed signal to a second signal state responsive to a previously indicated signal state and the observed first relationship between the signal level of the observed signal and the signal level of the first reference signal, the second signal state different than the first signal state;

starting a counter responsive to the indicated signal state of the observed signal being the second signal state;

selecting a second reference signal responsive to the indicated signal state of the observed signal being the second signal state;

observing a second relationship between the signal level of the observed signal and a signal level of the second reference signal;

setting the indicated signal state of the observed signal to the first signal state responsive to the previously indicated signal state and the observed second relationship between the signal level of the observed signal and the signal level of the second reference signal;

stopping the counter responsive to the indicated signal state of the observed signal being the first signal state; and

storing a measurement of the observed signal responsive to a transition time between observing the first relationship and the second relationship indicated by a value of the counter.

11. The method of claim 10 , wherein the observed signal is a discrete signal.

12. The method of claim 10 , providing a first and second fixed-level reference signals as the first reference signal and the second reference signal, respectively.

13. The method of claim 10 , further comprising:

determining states of the observed signal responsive to previous states of the observed signal and indications of relationships between signal levels of the observed signal and signal thresholds; and

providing a signal state indication associated with the observed signal responsive to the determined states of the observed signal.

14. The method of claim 13 , further comprising detecting an initial state of the observed signal.

15. The method of claim 13 , further comprising receiving values for the signal thresholds.

16. A computing system, comprising:

a processor; and

a memory storage having thereon machine-executable code adapted to permanently configure logic circuitry of the processor to:

select a first reference signal responsive to an indicated signal state of an observed signal being a first signal state;

observe a first relationship between a signal level of the observed signal and a signal level of the first reference signal;

set the indicated signal state of the observed signal to a second signal state responsive to a previously indicated signal state and the observed first relationship between the signal level of the observed signal and the signal level of the first reference signal, the second signal state different than the first signal state;

start a counter responsive to the indicated signal state of the observed signal being the second signal state;

select a second reference signal responsive to the signal state of the observed signal being the second signal state;

observe a second relationship between the signal level of the observed signal and a signal level of the second reference signal;

set the indicated signal state of the observed signal to the first signal state responsive to the previously indicated signal state and the observed second relationship between the signal level of the observed signal and the signal level of the second reference signal;

stop the counter responsive to the indicated signal state of the observed signal being the first signal state; and

store a measurement of the observed signal responsive to a transition time between observing the first relationship and the second relationship indicated by a value of the counter.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059357/0823 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059358/0398 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059264/0384 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 058214/0380 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0238 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058213/0959 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2020
From: AUNE, AMUND
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 054787/0896 →
Continuity (2)
Provisional Application 62706486 · Aug 19, 2020
Related Publication 20220060181A1 · Feb 24, 2022