IP Library Granted Patent US 11,881,775
Granted Patent B2
US 11,881,775 · App. 17/244,882 · Granted Jan 23, 2024

Systems and methods to remove input voltage dependency in a power converter

Inventor: Jason Rabb (Austin, TX)
Assignee: Microchip Technology inc.
H02M3/158H04Q1/28
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Quick Facts
Patent No.
US 11,881,775
App. No.
17/244,882
Granted
Jan 23, 2024
Kind
B2
Abstract

A system and method for generating a low supply voltage and a high supply voltage from an input voltage, wherein the dependency of the high supply voltage magnitude on the magnitude of the input voltage is removed and the resulting high supply voltage magnitude is a multiple of the low supply voltage magnitude. The low supply voltage and the high voltage may be implemented in a power converter of a communication system comprising a plurality of subscriber line interface circuits (SLICs).

Claims (51)

1. A power converter comprising:

a switching circuit to selectively provide an input voltage to a switching node at a switching frequency to establish a charging cycle and a discharging cycle based upon a modulated control signal to generate a low supply voltage having a low supply voltage magnitude at a first output node of a power converter, wherein the switching circuit comprises a first capacitor coupled between the first output node of the power converter and a ground node;

an input voltage cancellation circuit coupled to the switching node, wherein the switching circuit further comprises a first diode coupled between the input voltage cancellation circuit and the first output node of the power converter, wherein the input voltage cancellation circuit comprises a second capacitor coupled between the switching node and the first diode and a second diode coupled between the second capacitor and the ground node, and wherein the switching frequency of the switching circuit is such that a bias on the second capacitor does not have adequate time to discharge during the discharging cycle of the switching circuit so as to maintain an offset across the second capacitor equal to the input voltage thereby cancelling out the input voltage selectively provided to the switching node by the switching circuit such that the switching node swings by an amount which is independent of an amplitude of the input voltage; and

a boost circuit coupled to the switching node and to the switching circuit, the boost circuit operable to generate a high supply voltage having a high supply voltage magnitude at a second output node of the power converter, wherein the high supply voltage magnitude is a multiple of the low supply voltage magnitude.

2. The power converter of claim 1 , wherein the magnitude of the high supply voltage is independent of a magnitude of the input voltage.

3. The power converter of claim 1 , wherein a voltage swing of the switching node is substantially equal to the low supply voltage magnitude.

4. The power converter of claim 1 , wherein the switching circuit further comprises:

an energy storage element coupled between the switching node and the ground node;

a switching element coupled between the input voltage and the energy storage element to selectively provide the input voltage to the switching node based upon the modulated control signal; and

wherein the switching node is positioned between the switching element of the switching circuit and the input voltage cancellation circuit.

5. The power converter of claim 1 , wherein the bias on the second capacitor of the input voltage cancellation circuit is substantially constant during the discharge cycle of the switching circuit.

6. The power converter of claim 4 , wherein the modulated control signal is provided to the switching element by a pulse width modulated (PWM) controller.

7. The power converter of claim 1 , wherein the switching circuit further comprises:

an energy storage element coupled between the input voltage cancellation circuit and the ground node;

a switching element coupled between the input voltage and the energy storage element to selectively provide the input voltage to the input voltage cancellation circuit based upon the modulated control signal; and

wherein the switching node is positioned between the input voltage cancellation circuit and the first diode of the switching circuit.

8. The power converter of claim 1 , wherein the low supply voltage and the high supply voltage are negative supply voltages provided to one or more subscriber line interface circuits (SLICs).

9. The power converter of claim 1 , wherein the input voltage is a positive voltage, the low supply voltage is a negative voltage and the high supply voltage is a negative voltage.

10. A system comprising:

a plurality of subscriber line interface circuits (SLICs), each SLIC operable to communicate with a plurality of subscriber lines;

at least one subscriber line audio processing circuit (SLAC) coupled to each of the plurality of SLICs, the at least one SLAC operable to generate a reference voltage based upon an operating condition received from one or more of the plurality of SLICs;

a pulse width modulated (PWM) controller operable to receive the reference voltage from the SLAC and to generate a modulated control signal based upon the reference voltage;

a power converter operable to receive the modulated control signal and an input voltage and to generate a low supply voltage and a high supply voltage, wherein the voltage converter comprises;

a switching circuit to selectively provide an input voltage to a switching node at a switching frequency to establish a charging cycle and a discharging cycle based upon a modulated control signal to generate a low supply voltage having a low supply voltage magnitude at a first output node of a power converter, wherein the switching circuit comprises a first capacitor coupled between the first output node of the power converter and a ground node;

an input voltage cancellation circuit coupled to the switching node, wherein the switching circuit further comprises a first diode coupled between the input voltage cancellation circuit and the first output node of the power converter, wherein the input voltage cancellation circuit comprises a second capacitor coupled between the switching node and the first diode and a second diode coupled between the second capacitor and the ground node and wherein the switching frequency of the switching circuit is such that a bias on the second capacitor does not have adequate time to discharge during the discharging cycle of the switching circuit so as to maintain an offset across the second capacitor equal to the input voltage thereby cancelling input voltage selectively provided to the switching node by the switching circuit such that the switching node swings by an amount which is independent of an amplitude of the input voltage; and

a boost circuit coupled to the switching node and to the switching circuit, the boost circuit operable to generate the high supply voltage having a high supply voltage magnitude at a second output node of the power converter, wherein the high supply voltage magnitude is a multiple of the low supply voltage magnitude.

11. The system of claim 10 , wherein the high supply voltage magnitude is independent of a magnitude of the input voltage.

12. The system of claim 10 , wherein a voltage swing of the switching node is substantially equal to the low supply voltage magnitude.

13. The system of claim 10 , wherein the switching circuit comprises:

an energy storage element coupled between the switching node and the ground node;

a switching element coupled between the input voltage and the energy storage element to selectively provide the input voltage to the switching node based upon the modulated control signal; and

wherein the switching node is positioned between the switching element of the switching circuit and the input voltage cancellation circuit.

14. The system of claim 10 , wherein the bias on the second capacitor of the input voltage cancellation circuit is substantially constant during the discharge cycle of the switching circuit.

15. A method comprising:

generating, by a switching circuit, a low supply voltage having a low supply voltage magnitude at a first output node of a power converter by selectively providing an input voltage to a switching node at a switching frequency to establish a charging cycle and a discharging cycle based upon a modulated control signal;

charging a capacitor of an input voltage cancellation circuit during the charging cycle to establish a bias on the capacitor of the input voltage cancellation circuit equal to the input voltage and maintaining the bias on the capacitor input voltage cancellation circuit during the discharging cycle to cancel, by the input voltage cancellation circuit, the input voltage selectively provided to the switching node by the switching circuit such that the switching node swings by an amount which is independent of an amplitude of the input voltage; and

generating, by a boost circuit, a high supply voltage having a high supply voltage magnitude at a second output node of the power converter, wherein the high supply voltage magnitude is a multiple of the low supply voltage magnitude.

16. The method of claim 15 , wherein the high supply voltage magnitude is independent of a magnitude of the input voltage.

17. The method of claim 15 , wherein generating, by the switching circuit, the low supply voltage at the first output node of the power converter comprises:

activating and deactivating a switching element of the switching circuit based upon the modulated control signal to establish a duty cycle in the switching circuit, the duty cycle comprising the charging cycle and the discharging cycle;

charging an energy storage element of the switching circuit during the charging cycle of the switching circuit; and

discharging the energy storage element through a first diode and through a capacitor of the switching circuit during the discharging cycle, to generate the low supply voltage at the first output node of the power converter.

18. The method of claim 17 , wherein generating the high voltage supply voltage at the second output node comprises:

establishing a voltage across a pump capacitor of each of a plurality of boost stages of the boost circuit during the charging cycle, wherein the voltage across the pump capacitor is substantially equal to the low supply voltage magnitude plus the magnitude of the input voltage; and

generating the high supply voltage that is a multiple of the low supply voltage and is independent of the magnitude of the input voltage.

19. The method of claim 15 , further comprising:

providing, from one or more of a plurality of subscriber line interface circuits (SLICs), an operating condition to at least one subscriber line audio processing circuit (SLAC);

generating, at the at least one SLAC, a reference voltage based upon the operating condition received from one or more of the plurality of SLICs; and

receiving the reference voltage at a pulse width modulated (PWM) controller; and

generating the modulated control signal at the PWM controller based upon the reference voltage.

20. The method of claim 15 , further comprising, providing the low supply voltage and the high supply voltage to one or more subscriber line interface circuits (SLICs).

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059357/0823 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059358/0398 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059264/0384 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0238 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 058214/0380 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058213/0959 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2021
From: RABB, JASON
To: MICROCHIP TECHNOLOGY INC.
Reel/Frame 056090/0315 →