Method of forming split-gate flash memory cell with spacer defined floating gate and discretely formed polysilicon gates
A method of forming a memory device that includes forming a first polysilicon layer using a first polysilicon deposition over a semiconductor substrate, forming an insulation spacer on the first polysilicon layer, and removing some of the first polysilicon layer to leave a first polysilicon block under the insulation spacer. A source region is formed in the substrate adjacent a first side surface of the first polysilicon block. A second polysilicon layer is formed using a second polysilicon deposition. The second polysilicon layer is partially removed to leave a second polysilicon block over the substrate and adjacent to a second side surface of the first polysilicon block. A third polysilicon layer is formed using a third polysilicon deposition. The third polysilicon layer is partially removed to leave a third polysilicon block over the source region. A drain region is formed in the substrate adjacent to the second polysilicon block.
1. A method of forming a memory device, comprising:
forming a first polysilicon layer using a first polysilicon deposition over and insulated from a semiconductor substrate;
forming an insulation spacer directly on the first polysilicon layer;
removing some of the first polysilicon layer so as to leave a block of the first polysilicon layer under the insulation spacer, wherein the block of the first polysilicon layer has opposing first and second side surfaces;
forming a source region in the substrate adjacent the first side surface;
forming a second polysilicon layer using a second polysilicon deposition, different from the first polysilicon deposition, over the substrate;
removing some of the second polysilicon layer so as to leave a block of the second polysilicon layer that is over and insulated from the substrate, and laterally adjacent to and insulated from the second side surface;
forming a third polysilicon layer using a third polysilicon deposition, different from the first and second polysilicon depositions, over the substrate;
removing some of the third polysilicon layer so as to leave a block of the third polysilicon layer that is over and insulated from the source region; and
forming a drain region in the substrate adjacent to the block of the second polysilicon layer.
2. The method of claim 1 , wherein the forming of the insulation spacer comprises:
forming a block of insulation material on the first polysilicon layer;
forming a layer of insulation material on the first polysilicon layer and on the block of insulation material;
removing some of the layer of insulation material so as to leave the insulation spacer of the layer of insulation material disposed on the first polysilicon layer and abutting a side surface of the block of insulation material.
3. The method of claim 2 , wherein the removing of some of the first polysilicon layer comprises:
performing a first polysilicon etch to define the first side surface aligned with a first side of the insulation spacer;
removing the block of insulation material after the first polysilicon etch;
performing a second polysilicon etch after the removing of the block of insulation material to define the second side surface aligned with a second side of the insulation spacer.
4. The method of claim 2 , further comprising:
performing a polysilicon sloped etch on the first polysilicon layer such that a portion of an upper surface of the first polysilicon layer slopes upwardly as the portion of the upper surface approaches the block of insulation material;
wherein the insulation spacer is formed on the portion of the upper surface that slopes upwardly.
5. The method of claim 4 , wherein:
the block of the first polysilicon layer includes the upwardly sloping upper surface which terminates in a sharp edge at the second side surface.
6. The method of claim 5 , wherein the block of the third polysilicon layer includes a side surface having a notch that faces and is insulated from the sharp edge.
7. The method of claim 1 , wherein the removing of some of the second polysilicon layer comprises a polysilicon etch to form the block of the second polysilicon layer which is a spacer of polysilicon.
8. The method of claim 7 , further comprising:
forming a layer of silicon dioxide along the second side surface before the forming of the third layer of polysilicon, wherein the block of the third layer of polysilicon is insulated from the block of the first layer of polysilicon by the layer of silicon dioxide.
9. The method of claim 1 , wherein the removing of some of the second polysilicon layer and the removing of some of the third polysilicon layer comprise:
performing a chemical mechanical polish to remove upper portions of the second polysilicon layer and the third polysilicon layer disposed over the insulation spacer;
forming photoresist on a first portion of the second polysilicon layer adjacent the first side surface while leaving a second portion of the second polysilicon layer adjacent the first portion of the second polysilicon layer exposed by the photoresist; and
performing a polysilicon etch to remove the second portion of the second polysilicon layer.
10. The method of claim 1 , wherein the removing of some of the second polysilicon layer comprises:
performing a chemical mechanical polish before the forming of the third polysilicon layer to remove an upper portion of the second polysilicon layer disposed over the insulation spacer;
forming photoresist on a first portion of the second polysilicon layer adjacent the first side surface while leaving a second portion of the second polysilicon layer adjacent the first portion of the second polysilicon layer exposed by the photoresist after the removing of some of the third polysilicon layer; and
performing a polysilicon etch to remove the second portion of the second polysilicon layer.
11. A method of forming a memory device, comprising:
forming a first polysilicon layer using a first polysilicon deposition over and insulated from a semiconductor substrate;
forming an insulation spacer on the first polysilicon layer;
removing some of the first polysilicon layer so as to leave a block of the first polysilicon layer under the insulation spacer, wherein the block of the first polysilicon layer has opposing first and second side surfaces;
forming a source region in the substrate adjacent the first side surface;
forming a second polysilicon layer using a second polysilicon deposition over the substrate;
removing some of the second polysilicon layer so as to leave a block of the second polysilicon layer that is over and insulated from the substrate, and adjacent to and insulated from the second side surface;
forming a third polysilicon layer using a third polysilicon deposition over the substrate;
removing some of the third polysilicon layer so as to leave a block of the third polysilicon layer that is over and insulated from the source region; and
forming a drain region in the substrate adjacent to the block of the second polysilicon layer;
wherein the removing of some of the second polysilicon layer comprises:
performing a first polysilicon etch to remove a first portion of the second polysilicon layer on a first side of the insulation spacer, wherein the first polysilicon etch is performed before the forming of the third layer of polysilicon; and
performing a second polysilicon etch to remove a second portion of the second polysilicon layer on a second side of the insulation spacer opposite the first side of the insulation spacer, wherein the second polysilicon etch is performed after the forming of the third polysilicon layer.
12. The method of claim 11 , wherein the block of the second polysilicon layer is a spacer of polysilicon.