IP Library Granted Patent US 10,044,360
Granted Patent B2
US 10,044,360 · App. 15/677,909 · Granted Aug 7, 2018

ADC controller with temporal separation

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,044,360
App. No.
15/677,909
Granted
Aug 7, 2018
Kind
B2
Abstract

Embodiments of the present disclosure may include an ADC circuit including channel register sets, a conversion request flip-flop, a priority encoder circuit, and a controller circuit. The controller circuit may be configured to receive a conversion request signal, latch the conversion request signal into the conversion request flip-flop, determine by the priority encoder circuit a highest priority pending conversion request, and output an active channel identifier code. The channel identifier code may be configured to select the data channel register sets that are active by identifying received selection bits. The embodiments may include logic to store a converted value from a selected analog input to a data output register based on the channel identifier code.

Claims (79)

1. A microcontroller comprising:

an analog-to-digital conversion (ADC) circuit including a plurality of channel register sets;

a conversion request flip-flop;

a priority encoder circuit;

a controller circuit configured to:

receive a conversion request signal;

latch the conversion request signal into the conversion request flip-flop;

determine by the priority encoder circuit a highest priority pending conversion request; and

output an active channel identifier code, wherein the channel identifier code is configured to select which of the plurality of data channel register sets is active by identifying received analog selection bits; and

control logic configured to store a converted value from a selected analog input to a data output register based on the channel identifier code;

wherein:

the controller circuit is further configured to cause subsequent measurements from the selected analog input; and

the control logic is further configured to store the subsequent measurements into a plurality of channel registers.

2. The microcontroller according to claim 1 , wherein the controller circuit includes a state machine.

3. The microcontroller according to claim 1 , wherein the conversion request flip-flop is configured to be cleared as the conversion process is completed.

4. A microcontroller comprising:

an analog-to-digital conversion (ADC) circuit including a plurality of channel register sets;

a conversion request flip-flop;

a priority encoder circuit;

a controller circuit configured to:

receive a conversion request signal;

latch the conversion request signal into the conversion request flip-flop;

determine by the priority encoder circuit a highest priority pending conversion request; and

output an active channel identifier code, wherein the channel identifier code is configured to select which of the plurality of data channel register sets is active by identifying received analog selection bits;

control logic configured to store a converted value from a selected analog input to a data output register based on the channel identifier code; and

a plurality of connection pins, a timer, and a pulsed-width-modulation (PWM) module, wherein the conversion request signal is generated by one of the timer, the PWM module, or the device pin.

5. The microcontroller according to claim 1 , wherein the selected analog input is selected from a plurality of analog inputs applied to an analog input multiplexer.

6. The microcontroller according to claim 1 , wherein:

the microcontroller further comprises an interrupt handler circuit configured to generate an interrupt to software after the subsequent measurements are stored in the plurality of channel registers.

7. An analog-to-digital converter (ADC), comprising:

a plurality of channel register sets;

a conversion request flip-flop;

a priority encoder circuit;

a controller circuit configured to:

receive a conversion request signal;

latch the conversion request signal into the conversion request flip-flop;

determine by the priority encoder circuit a highest priority pending conversion request; and

output an active channel identifier code, wherein the channel identifier code is configured to select which of the plurality of data channel register sets is active by identifying received analog selection bits; and

control logic configured to store a converted value from a selected analog input to a data output register based on the channel identifier code;

wherein:

the controller circuit is further configured to cause subsequent measurements from the selected analog input; and

the control logic is further configured to store the subsequent measurements into a plurality of channel registers.

8. The ADC according to claim 7 , wherein the controller circuit includes a state machine.

9. The ADC according to claim 7 , wherein the conversion request flip-flop is configured to be cleared as the conversion process is completed.

10. An analog-to-digital converter (ADC), comprising:

a plurality of channel register sets;

a conversion request flip-flop;

a priority encoder circuit;

a controller circuit configured to:

receive a conversion request signal;

latch the conversion request signal into the conversion request flip-flop;

determine by the priority encoder circuit a highest priority pending conversion request; and

output an active channel identifier code, wherein the channel identifier code is configured to select which of the plurality of data channel register sets is active by identifying received analog selection bits; and

control logic configured to store a converted value from a selected analog input to a data output register based on the channel identifier code; and

a plurality of connection pins, a timer, and a pulsed-width-modulation (PWM) module, wherein the conversion request signal is generated by one of the timer, the PWM module, or the device pin.

11. The ADC according to claim 7 , wherein the selected analog input is selected from a plurality of analog inputs applied to an analog input multiplexer.

12. The ADC according to claim 7 , wherein:

the ADC further comprises an interrupt handler circuit configured to generate an interrupt to software after the subsequent measurements are stored in the plurality of channel registers.

13. A method for an automated analog-digital-conversion within a microcontroller by an analog-to-digital conversion circuit comprising a plurality of channel register sets, the method comprising the steps of:

receiving a conversion request signal and latching the conversion request signal into a conversion request flip-flop;

receiving a plurality of analog selection bits;

determining by a priority encoder circuit a highest priority pending conversion request;

outputting an active channel identifier code, wherein the channel identifier code is configured to select which of a plurality of data channel register sets is active from a plurality of analog selection bits;

forwarding analog selection bits to an analog input multiplexer;

storing a converted value from a selected analog input to a data output register associated with the channel identifier code;

causing subsequent measurements from the selected analog input; and

storing the subsequent measurements into a plurality of channel registers.

14. The method according to claim 13 , further comprising clearing the conversion request flip-flop as the conversion process is completed.

15. A method for an automated analog-digital-conversion within a microcontroller by an analog-to-digital conversion circuit comprising a plurality of channel register sets, the method comprising the steps of:

receiving a conversion request signal and latching the conversion request signal into a conversion request flip-flop;

receiving a plurality of analog selection bits;

determining by a priority encoder circuit a highest priority pending conversion request;

outputting an active channel identifier code, wherein the channel identifier code is configured to select which of a plurality of data channel register sets is active from a plurality of analog selection bits;

forwarding analog selection bits to an analog input multiplexer; and

storing a converted value from a selected analog input to a data output register associated with the channel identifier code;

wherein the conversion request signal is generated by a timer, PWM module, or device pin as selected by a setting in a conversion request signal selection register.

16. The method according to claim 13 , further comprising selecting the analog input from a plurality of analog inputs applied to an analog input multiplexer.

17. The method according to claim 13 , further comprising:

generating an interrupt to software after the subsequent measurements are stored in the plurality of channel registers.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2017
From: KRIS, BRYAN
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 043619/0372 →