Integrated inductor with a stacked metal wire
A low-resistance thick-wire integrated inductor may be formed in an integrated circuit (IC) device. The integrated inductor may include an elongated inductor wire defined by a metal layer stack including an upper metal layer, middle metal layer, and lower metal layer. The lower metal layer may be formed in a top copper interconnect layer, the upper metal layer may be formed in an aluminum bond pad layer, and the middle metal layer may comprise a copper tub region formed between the aluminum upper layer and copper lower layer. The wide copper region defining the middle layer of the metal layer stack may be formed concurrently with copper vias of interconnect structures in the IC device, e.g., by filling respective openings using copper electrochemical plating or other bottom-up fill process. The elongated inductor wire may be shaped in a spiral or other symmetrical or non-symmetrical shape.
1. An integrated circuit (IC) device, comprising:
an IC structure including an integrated inductor;
wherein the integrated inductor comprises an elongated inductor wire defined by a metal layer stack including an upper metal layer, a middle metal layer, and a lower metal layer; and
wherein a lateral width of the middle metal layer of the inductor wire is greater than 1 μm; and
wherein the middle metal layer of the inductor wire is formed in a common layer with at least one metal via distinct from the integrated inductor.
2. The IC device of claim 1 , wherein:
the upper metal layer of the inductor wire comprises aluminum;
the middle metal layer of the inductor wire comprises copper; and
the lower metal layer of the inductor wire comprises copper.
3. The IC device of claim 2 , wherein the lower metal layer of the inductor wire comprising copper comprises a top interconnect layer of the IC device.
4. The IC device of claim 2 , wherein the upper metal layer of the inductor wire comprises a region of an aluminum bond pad layer.
5. The IC device of claim 1 , wherein:
a respective lateral width or diameter of the at least one metal via is less than 1 μm.
6. The IC device of claim 1 , wherein:
the middle metal layer of the inductor wire has a lateral width greater than 2 μm; and
a respective lateral width or diameter of the at least one metal via is less than 0.5 μm.
7. The IC device of claim 1 , wherein:
a lateral width of the upper metal layer of the inductor wire is greater than 1 μm; and
a lateral width of the lower metal layer of the inductor wire is greater than 1 μm.
8. The IC device of claim 1 , wherein the integrated inductor has a resistance of less than 5 mΩ/sq.
9. The IC device of claim 1 , wherein the integrated inductor comprises a spiral inductor.
10. The IC device of claim 9 , wherein the spiral inductor includes:
a non-overlap region in which the elongated inductor wire is defined by the metal layer stack including the upper metal layer, the middle metal layer, and the lower metal layer; and
an overlap region in which the elongated inductor wire includes the upper metal layer and the lower metal layer, but omits the middle metal layer, such that in the overlap region the upper metal layer is separate from the lower metal layer by a non-conductive material.
11. The IC device of claim 1 , wherein the IC structure comprises a die mount base configured for mounting at least one die.
12. The IC device of claim 1 , wherein the IC structure comprises an interposer.
13. An integrated circuit (IC) device, comprising:
an IC structure including an integrated inductor;
wherein the integrated inductor comprises an elongated inductor wire defined by a metal layer stack including:
an upper metal layer having an upper metal lateral width;
a middle metal layer having a middle metal lateral width; and
a lower metal layer having a lower metal lateral width;
wherein a largest width of the upper metal lateral width, middle metal lateral width, and lower metal lateral width varies from a smallest width of the upper metal lateral width, middle metal lateral width, and lower metal lateral width by less than 100%; and
wherein the middle metal layer of the inductor wire is formed in a common layer with at least one metal via distinct from the integrated inductor.
14. The IC device of claim 13 , wherein the largest width of the upper metal lateral width, middle metal lateral width, and lower metal lateral width varies from the smallest width of the upper metal lateral width, middle metal lateral width, and lower metal lateral width by less than 25%.
15. An integrated circuit (IC) device, comprising:
an IC structure including an integrated inductor;
wherein the integrated inductor comprises an elongated inductor wire extending along an elongated lateral path defining a current path; and
wherein the elongated inductor wire includes:
a non-overlap region defined by a metal layer stack including an upper metal layer, a middle metal layer, and a lower metal layer conductively coupled to each other, allowing the upper metal layer, middle metal layer, and lower metal layer to carry current in the same direction along the current path; and
an overlap region at a second location along the current path at which two sections of the elongated inductor wire cross each other, wherein the overlap region of the elongated inductor wire includes the upper metal layer and the lower metal layer, but omits the middle metal layer, such that in the overlap region the upper metal layer is insulated from the lower metal layer by a non-conductive material, allowing the upper metal layer and lower metal layer to carry current in opposite directions at the overlap region.
16. The IC device of claim 15 , wherein the integrated inductor comprises a spiral inductor.