Line discharge circuit with low power components
A control circuit includes a discharge circuit, a control logic, and an output. The output is communicatively coupled to a control terminal of a power transistor. The control circuit further includes an input communicatively coupled to an input of the transistor. In a discharge mode of operation, the control logic is configured to provide a control terminal voltage to the control terminal of the power transistor via the output. The control terminal voltage is configured to operate the power transistor linearly to dissipate energy stored in a capacitance connected to an input of the power transistor/In the discharge mode, the discharge circuit is configured to receive a discharge current from an output of the power transistor, and to dissipate remaining energy undissipated by the power transistor.
1. A control circuit, comprising:
a discharge circuit;
a control logic;
a first output communicatively coupled to a control terminal of a first power transistor, the first power transistor including the control terminal, a first terminal, and a second terminal; and
an input communicatively coupled to the second terminal of the first power transistor;
wherein, in a discharge mode of operation:
the control logic is configured to provide a first control terminal voltage to the control terminal of the first power transistor via the first output, the first control terminal voltage configured to operate the first power transistor in a linear region of operation to dissipate energy stored in a first capacitance connected to the first terminal of the first power transistor; and
the discharge circuit is configured to:
receive a discharge current from the second terminal of the first power transistor; and
dissipate remaining energy undissipated by the first power transistor.
2. The control circuit of claim 1 , wherein the first power transistor is external to a die including the control circuit.
3. The control circuit of claim 1 , wherein the second terminal of the first power transistor is a source of the first power transistor.
4. The control circuit of claim 1 , wherein the discharge circuit is configured to dissipate less energy than the first power transistor is configured to dissipate during operation in the linear region.
5. The control circuit of claim 1 , wherein the discharge circuit includes a current source and a pair of transistors configured to mirror a reference current to dissipate the remaining energy.
6. The control circuit of claim 1 , wherein the discharge circuit includes a resistor configured to dissipate the remaining energy.
7. The control circuit of claim 1 , further comprising a second output communicatively coupled to a control terminal of a second power transistor, the second power transistor including the control terminal, a first terminal, and a second terminal; wherein: the input is further communicatively coupled to the second terminal of the second power transistor through an inductor; and in the discharge mode of operation: the control logic is further configured to provide a second control terminal voltage to the control terminal of the second power transistor, the second control terminal voltage configured to operate the second power transistor in the linear region of operation to dissipate energy stored in a second capacitance connected to the first terminal of the second power transistor; the received discharge current includes components from the output of the first power transistor and the output of the second power transistor; and the discharge circuit is further configured to dissipate remaining energy undissipated by the second power transistor.
8. The control circuit of claim 1 , further comprising a voltage source, wherein the control terminal voltage is provided by the control logic as originating from the voltage source.
9. A system, comprising:
a voltage source;
a power regulator circuit configured to convert voltage from the voltage source to a voltage output, the power regulator circuit including:
a first power transistor including a control terminal, a first terminal, and a second terminal; and
a control circuit, including:
a discharge circuit;
a control logic;
a first output communicatively coupled to the control terminal of the first power transistor; and
an input communicatively coupled to the second terminal of the first power transistor;
wherein, in a discharge mode of operation:
the control logic is configured to provide a first control terminal voltage to the control terminal of the first power transistor via the first output, the first control terminal voltage configured to operate the first power transistor in a linear region of operation to dissipate energy stored in a first capacitance connected to the first terminal of the first power transistor; and
the discharge circuit is configured to:
receive a discharge current from the second terminal of the first power transistor; and
dissipate remaining energy undissipated by the first power transistor.
10. The system of claim 9 , wherein the first power transistor is external to a die including the control circuit.
11. The system of claim 9 , wherein the second terminal of the first power transistor is a source of the first power transistor.
12. The system of claim 9 , wherein the discharge circuit is configured to dissipate less energy than the first power transistor is configured to dissipate during operation in the linear region.
13. The system of claim 9 , wherein the discharge circuit includes a current source and a pair of transistors configured to mirror a reference current to dissipate the remaining energy.
14. The system of claim 9 , wherein the discharge circuit includes a resistor configured to dissipate the remaining energy.
15. The system of claim 9 , wherein the control circuit further comprises a second output communicatively coupled to a control terminal of the second power transistor, the second power transistor including the control terminal, a first terminal, and a second terminal; wherein: the input is further communicatively coupled to the second terminal of the second power transistor through an inductor; and in the discharge mode of operation: the control logic is further configured to provide a second control terminal voltage to the control terminal of the second power transistor, the second control terminal voltage configured to operate the second power transistor in the linear region of operation to dissipate energy stored in a second capacitance connected to the first terminal of the second power transistor; the received discharge current includes components from the output of the first power transistor and the output of the second power transistor; and the discharge circuit is further configured to dissipate remaining energy undissipated by the second power transistor.
16. The system of claim 9 , wherein the control terminal voltage is provided by the control logic as originating from the voltage source.
17. A method, comprising:
providing a first output communicatively coupled to a control terminal of a first power transistor, the first power transistor including the control terminal, a first terminal, and a second terminal;
providing an input communicatively coupled to the second terminal of the first power transistor;
in a discharge mode of operation:
providing a first control terminal voltage to the control terminal of the first power transistor via the first output, the first control terminal voltage configured to operate the first power transistor in a linear region of operation to dissipate energy stored in a first capacitance connected to the first terminal of the first power transistor; and
receiving a discharge current from the second terminal of the first power transistor;
and
dissipating remaining energy undissipated by the first power transistor.
18. The method of claim 17 , wherein the remaining energy undissipated is less energy than the first power transistor is configured to dissipate during operation in the linear region.
19. The method of claim 17 , further comprising providing a second output communicatively coupled to a control terminal of a second power transistor, the second power transistor including the control terminal, a first terminal, and a second terminal; wherein: the input is further communicatively coupled to the second terminal of the second power transistor through an inductor; and in the discharge mode of operation: the method further includes providing a second control terminal voltage to the control terminal of the second power transistor, the second control terminal voltage configured to operate the second power transistor in the linear region of operation to dissipate energy stored in a second capacitance connected to the first terminal of the second power transistor; the received discharge current includes components from the output of the first power transistor and the output of the second power transistor; and the method further includes dissipating remaining energy undissipated by the second power transistor.
20. The method of claim 17 , wherein the control terminal voltage is provided by the control logic as originating from a voltage source.