IP Library Granted Patent US 11,197,322
Granted Patent B2
US 11,197,322 · App. 16/843,648 · Granted Dec 7, 2021

Emulating collisions in wired local area networks and related systems, methods, and devices

Inventors: Venkatraman Iyer (Austin, TX); Dixon Chen (Guangdong, CN); John Junling Zang (Guangdong, CN); Michael Rentschler (Baden-Wuerttemberg, DE)
Assignee: Microchip Technology Incorporated
H04W74/0816
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Quick Facts
Patent No.
US 11,197,322
App. No.
16/843,648
Granted
Dec 7, 2021
Kind
B2
Abstract

Various embodiments relate to wired local area networks. A method may include detecting, at a node in a wired local area network, at least one event. A physical layer device of the network node is configured to implement a physical level collision avoidance (PLCA) sublayer. The at least one event may include at least one of an amount of data stored in a first-in-first-out (FIFO) buffer of the node being at least a threshold amount, and a received packet being a precision time protocol (PTP) packet incurring variable delay. The method may further include emulating a collision at the node in response to the at least one detected event.

Claims (46)

1. A physical layer device for a network node, the physical layer device comprising:

a buffer configured to receive a transmit packet provided by a media access control sublayer for transmission at a shared communication medium of a wired local area network, the physical layer device configured to implement a physical level collision avoidance (PLCA) sublayer; and

control circuitry configured to:

detect at least one event including at least one of:

an amount of data stored by the buffer being at least a threshold amount, or

the received transmit packet being a precision time protocol (PTP) packet incurring variable delay; and

emulate a collision at the network node by asserting a collision signal to the media access control sublayer in response to the at least one detected event.

2. The physical layer device of claim 1 , wherein the control circuitry is configured to pad the PTP packet so as to include at least 64 bytes responsive to a detection that the received transmit packet is the PTP packet received outside of a transmit opportunity of the network node.

3. The physical layer device of claim 1 , wherein the control circuitry is configured to pad the PTP packet to include a pattern to cause an error responsive to a detection that the received transmit packet is the PTP packet received outside of a transmit opportunity of the network node.

4. The physical layer device of claim 3 , wherein the pattern includes 010101.

5. The physical layer device of claim 1 , wherein the control circuitry is configured to add an error delimiter to the PTP packet responsive to a detection that the received transmit packet is the PTP packet received outside of a transmit opportunity of the network node.

6. The physical layer device of claim 1 , wherein responsive to a detection that the received transmit packet is the PTP packet received outside of a transmit opportunity of the network node, the control circuitry is configured to:

pad the PTP packet with a pattern such that the PTP packet includes at least 64 bytes of payload and the pattern causes an error; and

add an end-of-stream delimiter to the PTP packet.

7. The physical layer device of claim 1 , wherein the control circuitry is configured to detect a fixed delay incurred by the PTP packet responsive to a transmit enable (TX_EN) signal assertion within a transmit opportunity of the network node or responsive to a deassertion of a carrier sense (CRS) signal after an emulated collision.

8. A physical layer device for a network node, the physical layer device comprising:

a buffer configured to store a transmit packet for transmission at a shared transmission medium of a wired local area network, the physical layer device configured to implement a physical level collision avoidance (PLCA) sublayer; and

control circuitry configured to:

determine that an amount of data stored in the buffer is at least a threshold amount; and

emulate a collision by asserting a collision signal in response to the amount of data being at least the threshold amount.

9. The physical layer device of claim 8 , wherein the threshold amount is programmable to be a maximum of 49.5 bytes.

10. The physical layer device of claim 8 , wherein the wired local area network includes more than eight (8) nodes.

11. The physical layer device of claim 8 , wherein the control circuitry is configured to emulate the collision on a media independent interface (MII).

12. A physical layer device for a network node, the physical layer device comprising:

a buffer configured to store a transmit packet received from a media access control sublayer for transmission at a shared transmission medium of a wired local area network, the wired local area network including a physical level collision avoidance (PLCA) sublayer; and

control circuitry configured to:

identify the stored transmit packet as a precision time protocol (PTP) packet; and

emulate a collision at the network node by asserting a collision signal to the media access control sublayer in response to the stored transmit packet being identified as the PTP packet and the identified PTP packet incurring variable delay.

13. The physical layer device of claim 12 , wherein the control circuitry is further configured to emulate a collision by asserting the collision signal to the media access control sublayer in response to an amount of data stored by the buffer exceeding a predetermined threshold level.

14. The physical layer device of claim 12 , wherein the control circuitry is further configured to at least one of:

pad the PTP packet with a pattern such that the padded PTP packet includes at least 64 bytes and the pattern causes an error; or

add an end-of-stream delimiter to the PTP packet.

15. The physical layer device of claim 12 , wherein the control circuitry is configured to emulate the collision on a media independent interface (MII) or a reduced media independent interface (RMII).

16. A wired local area network, comprising:

a node including a physical layer (PHY), the PHY including a physical level collision avoidance (PLCA) sublayer, the PHY configured to:

detect at least one event including at least one of an amount of data stored in a first-in-first-out (FIFO) buffer of the node being at least a threshold amount and a received packet being a precision time protocol (PTP) packet incurring variable delay; and

emulate a collision at the node in response to the at least one detected event.

17. The wired local area network of claim 16 , the PHY further configured to:

pad the PTP packet with a pattern such that the padded PTP packet includes at least 64 bytes and the pattern causes a cyclic redundancy check (CRC) error; and

add an end-of-stream delimiter to the PTP packet.

18. The wired local area network of claim 16 , wherein the received packet is received from a media access control sublayer of the node.

19. The wired local area network of claim 16 , wherein the threshold amount is programmable to be less than or equal to one of 49.5 bytes or 64 bytes.

20. A vehicle including a wired local area network including a physical level collision avoidance (PLCA) sublayer, the wired local area network comprising:

a number of nodes, at least one node of the number of nodes configured to:

detect at least one event, the at least one event including at least one of: an amount of data stored in a first-in-first-out (FIFO) buffer of the node being at least a threshold amount; and a transmit packet received at the node from a link layer of the node being a precision time protocol (PTP) packet and incurring variable delay; and

emulate a collision at the at least one node in response to the at least one detected event.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 6, 2021
From: IYER, VENKAT; CHEN, DIXON; ZANG, JOHN JUNLING; RENTSCHLER, MICHAEL
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 054912/0700 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
Continuity (2)
Provisional Application 62842873 · May 3, 2019
Related Publication 20200351943A1 · Nov 5, 2020
Cited By (2)
US 12,256,443 US 12,622,238