IP Library Granted Patent US 11,101,973
Granted Patent B2
US 11,101,973 · App. 16/588,621 · Granted Aug 24, 2021

Fast initial phase search for digital clock and data recovery and related systems, devices, and methods

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Quick Facts
Patent No.
US 11,101,973
App. No.
16/588,621
Granted
Aug 24, 2021
Kind
B2
Abstract

Systems, devices, and methods related to selecting a sample phase of a signal are disclosed. A method includes sampling a signal including a plurality of symbols with a plurality of different sample phases to obtain sample values of each of the plurality of symbols at each of the plurality of different sample phases. The signal is received from a shared transmission medium. The method also includes determining an edge sample phase of the plurality of different sample phases that corresponds to edges of the symbols based on the sample values. The method further includes determining a center sample phase of the plurality of different sample phases based on the determined edge sample phase, and using the determined center sample phase to determine values of the symbols.

Claims (39)

1. A physical layer device, comprising:

an input configured to receive a signal including a plurality of symbols from a shared transmission medium of a wired local area network; and

one or more processors configured to:

sample the signal using a plurality of different sample phases to obtain sample values of each of the plurality of symbols at each of the plurality of different sample phases;

determine an edge sample phase of the plurality of different sample phases responsive to the obtained sample values of each of the plurality of symbols at each of the plurality of different sample phases;

determine a center sample phase of the plurality of different sample phases responsive to the determined edge sample phase; and

use the determined center sample phase to determine values of each of the plurality of symbols;

wherein the one or more processors are configured to determine the edge sample phase by:

performing, for each sample phase of the plurality of different sample phases, an exclusive or (XOR) computation between those of the sample values corresponding to a sample phase and those of the sample values corresponding to a sample phase immediately adjacent in time to the sample phase;

summing results for each XOR computation; and

determining the edge sample phase to correspond to a highest sum of results for the XOR computation.

2. The physical layer device of claim 1 , wherein the sample phase immediately adjacent in time to the sample phase comprises a preceding sample phase immediately preceding the sample phase in time.

3. The physical layer device of claim 1 , wherein the plurality of different sample phases is spaced at substantially equal intervals of time.

4. The physical layer device of claim 1 , further comprising:

sampling circuitry configured to determine the sample values of the signal;

an edge detector configured to determine the edge sample phase based, at least in part, on the sample values; and

a center detector configured to determine the center sample phase based, at least in part, on the determined edge sample phase.

5. The physical layer device of claim 1 , further comprising a computer-readable medium operably coupled to the one or more processors, the computer-readable medium having computer-readable instructions stored thereon, the computer-readable instructions configured to instruct the one or more processors to perform at least a portion of functions of the one or more processors.

6. A method of selecting a sample phase of a signal from a plurality of different sample phases, the method comprising:

sampling a signal including a plurality of symbols with a plurality of different sample phases to obtain sample values of each of the plurality of symbols at each of the plurality of different sample phases, the signal received from a shared transmission medium of a wired local area network;

determining an edge sample phase of the plurality of different sample phases responsive to the obtained sample values of each of the plurality of symbols at each of the plurality of different sample phases;

determining a center sample phase of the plurality of different sample phases responsive to the determined edge sample phase; and

using the determined center sample phase to determine values of the symbols;

wherein determining the edge sample phase of the plurality of different sample phases comprises:

performing, for each sample phase of the plurality of different sample phases, an exclusive or (XOR) computation between those of the sample values corresponding to the sample phase and those of the sample values corresponding to a sample phase immediately adjacent in time to the sample phase;

summing results for each XOR computation; and

determining the edge sample phase to be the sample phase corresponding to a highest sum of the results for the XOR computation.

7. The method of claim 6 , wherein determining a center sample phase of the plurality of different sample phases comprises determining the center sample phase to be a sample phase that is approximately one half of a symbol length of time from the determined edge sample phase.

8. The method of claim 6 , wherein the sample phase immediately adjacent in time to the sample phase comprises a preceding sample phase immediately preceding the sample phase in time.

9. The method of claim 6 , wherein a number of the plurality of different sample phases comprises four different sample phases and the center sample phase is selected to be one of two sample phases immediately preceding the edge sample phase in time.

10. A non-transitory computer-readable storage medium, the computer-readable storage medium including instructions that when executed by one or more processors, cause the one or more processors to:

sample a signal including a plurality of symbols with a plurality of different sample phases to obtain sample values of each of the plurality of symbols at each of the plurality of different sample phases, the signal received from a shared transmission medium of a wired local area network;

determine an edge sample phase of the plurality of different sample phases based on the sample values;

determine a center sample phase of the plurality of different sample phases based on the determined edge sample phase; and

use the determined center sample phase to determine values of the symbols;

wherein the instructions, when executed by the one or more processors, cause the one or more processors to determine the edge sample phase by:

performing, for each sample phase of the plurality of different sample phases, an exclusive or (XOR) computation between those of the sample values corresponding to the sample phase and those of the sample values corresponding to a sample phase immediately adjacent in time to the sample phase;

summing results for each XOR computation; and

determining the edge sample phase to be the sample phase corresponding to a highest sum of the results for the XOR computation.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2019
From: YU, JIACHI; CHEN, DIXON; YANG, KEVIN
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 050570/0107 →