Semiconductor device assemblies with molded support substrates
Semiconductor device assemblies with molded support substrates and associated methods are disclosed herein. In one embodiment, a semiconductor device assembly includes a support substrate formed from a molded material, a first semiconductor die at least partially embedded within the support substrate, a plurality of interconnects extending at least partially through the molded material, a second semiconductor die coupled to the support substrate, and a third semiconductor die coupled to the support substrate. The assembly can also include a redistribution network formed on a first and/or second side of the support substrate, and a plurality of conductive contacts electrically coupled to at least one of the first, second and third semiconductor dies.
1. A semiconductor device assembly, comprising:
a support substrate formed from a molded material, wherein the support substrate includes a first side and a second side opposite the first side;
a first semiconductor die at least partially embedded within the support substrate;
a plurality of interconnects extending at least partially through the molded material;
a second semiconductor die coupled to the first side of the support substrate;
a third semiconductor die coupled to the first side of the support substrate; and
a plurality of conductive contacts at the second side of the support substrate, wherein the conductive contacts are operably coupled to at least one of the first, second and third semiconductor dies via the plurality of interconnects,
wherein the first semiconductor die is an interface die including a communication component, the second semiconductor die includes a memory controller, and the third semiconductor die includes a memory circuit.
2. The semiconductor device assembly of claim 1 wherein the molded material is a first mold material, and wherein the semiconductor device assembly further comprises a second mold material formed over the first side of the support substrate and encapsulating the second and third semiconductor dies.
3. The semiconductor device assembly of claim 2 , further comprising at least one fourth semiconductor die stacked on the third semiconductor die and encapsulated by the second mold material.
4. The semiconductor device assembly of claim 1 wherein the plurality of interconnects comprises:
one or more first interconnects extending from the first side of the support substrate to at least the second side of the support substrate;
one or more second interconnects extending from the first side of the support substrate and contacting the first semiconductor die;
one or more third interconnects extending from the second side of the support substrate and contacting the first semiconductor die.
5. The semiconductor device assembly of claim 1 wherein the first semiconductor die has a backside, an active side opposite the backside, bond pads at the active side, and a sidewall between the active side and the backside, and wherein the backside and the sidewall are fully encapsulated within the molded material.
6. The semiconductor device assembly of claim 1 , further comprising a redistribution network formed on the first side of the support substrate and extending between the molded material and at least one of the second and third semiconductor dies.
7. The semiconductor device assembly of claim 1 wherein the support substrate further comprises a first mounting region and a second mounting region peripheral to the first mounting region, and wherein:
the second semiconductor die is mounted to the first mounting region;
the third semiconductor die is mounted to the second mounting region.
8. The semiconductor device assembly of claim 1 wherein the molded material is an epoxy resin.
9. A semiconductor device assembly, comprising:
a support structure of mold material, the support structure including a mounting surface defined by the mold material, a plurality of interconnects extending at least partially through the mold material, and a plurality of conductive contacts coupled to corresponding ones of the interconnects;
a stack of memory dies coupled to the mounting surface;
a logic die operably coupled to the stack of memory dies via one or more of the interconnects; and
an intermediary die at least partially encapsulated by the mold material and electrically coupled to at least one of the logic die and the stack of memory dies via one or more of the interconnects,
wherein the stack of memory dies includes a memory controller, the logic die is an interface die including a communication component, and the intermediary die includes a memory circuit.
10. The semiconductor device assembly of claim 9 wherein the intermediary die has a backside, an active side opposite the backside, bond pads at the active side, and a sidewall between the active side and the backside, and wherein the backside and the sidewall are fully encapsulated within the mold material.
11. The semiconductor device assembly of claim 9 wherein the logic die is mounted to the mounting surface.
12. The semiconductor device assembly of claim 9 wherein one or more of the interconnects is attached to the intermediary die, and wherein one or more of the interconnects are attached to the logic die.
13. The semiconductor device assembly of claim 9 wherein the support structure further comprises a first redistribution network and a second redistribution network, each extending over opposite sides of the mold material and coupled to one or more of the interconnects.
14. The semiconductor device assembly of claim 13 wherein the second redistribution network includes one or more of the conductive contacts.
15. The semiconductor device assembly of claim 9 wherein the mold material is an epoxy resin.
16. The semiconductor device assembly of claim 9 wherein the logic die is at least partially encapsulated by the mold material.