Cu wiring forming method and semiconductor device manufacturing method
A method of forming, on a substrate having on a surface thereof a film having a trench of a preset pattern and a via at a bottom of the trench, a Cu wiring by burying Cu or Cu alloy in the trench and the via includes forming a barrier film (process 2 ); forming, on a surface of the barrier film, a wetting target layer of Ru or the like (process 3 ); forming, on a surface of the wetting target layer, a Cu-based seed film by PVD (process 4 ); filling the via by heating the substrate and flowing the Cu-based seed film into the via (process 5 ); and forming, on the substrate surface, a Cu-based film made of the Cu or Cu alloy by PVD under a condition where the Cu-based film is flown on the wetting target layer to bury the Cu-based film in the trench (process 6 ).
1. A Cu wiring forming method of forming, on a substrate having on a surface thereof a film provided with a trench of a preset pattern and a via formed at a bottom of the trench, a Cu wiring by burying Cu or Cu alloy in the trench and the via, the Cu wiring forming method comprising:
forming a barrier film on a surface of the film;
forming, on a surface of the barrier film, a wetting target layer made of Ru or Co to be wet with the Cu or Cu alloy;
forming, on a surface of the wetting target layer, a Cu-based seed film made of the Cu or Cu alloy and having a thickness corresponding to an amount for filling only the via by PVD;
filling the via by heating the substrate on which the Cu-based seed film is already formed and flowing the Cu-based seed film into the via so as to expose surface portions of the wetting target layer excluding the via; and
forming, on the surface of the substrate on which the via is already filled, a Cu-based film made of the Cu or Cu alloy by PVD under a condition that allows the Cu-based film to be flown on the wetting target layer to bury the Cu-based film in the trench.
2. The Cu wiring forming method of claim 1 ,
wherein the wetting target layer is formed to have a thickness of 1 nm to 5 nm.
3. The Cu wiring forming method of claim 1 ,
wherein the wetting target layer is formed by CVD.
4. The Cu wiring forming method of claim 1 ,
wherein a heating temperature for heating the substrate when flowing the Cu-based seed film into the via is in a range from 200° C. to 400° C.
5. The Cu wiring forming method of claim 1 ,
wherein the Cu-based film is formed by performing ionized PVD while heating the substrate at 65° C. to 350° C.
6. The Cu wiring forming method of claim 1 ,
wherein the heating of the substrate after the forming of the Cu-based seed film and the forming of the Cu-based film are performed in a single apparatus.
7. The Cu wiring forming method of claim 1 ,
wherein the forming of the Cu-based seed film, the heating of the substrate after the forming of the Cu-based seed film and the forming of the Cu-based film are performed in a single apparatus.
8. A semiconductor device manufacturing method of manufacturing, on a substrate having thereon an interlayer insulating film provided with a trench of a preset pattern and a via connecting a bottom portion of the trench and a lower wiring, a semiconductor device by burying Cu or Cu alloy in the trench and the via to form a Cu wiring, the semiconductor device manufacturing method comprising:
forming a barrier film on a surface of the interlayer insulating film;
forming, on a surface of the barrier film, a wetting target layer made of Ru or Co to be wet with the Cu or Cu alloy;
forming, on a surface of the wetting target layer, a Cu-based seed film made of the Cu or Cu alloy and having a thickness corresponding to an amount for filling only the via by PVD;
filling the via by heating the substrate on which the Cu-based seed film is already formed and flowing the Cu-based seed film into the via so as to expose surface portions of the wetting target layer excluding the via;
forming, on a surface of the substrate on which the via is already filled, a Cu-based film made of the Cu or Cu alloy by PVD under a condition that allows the Cu-based film to be flown on the wetting target layer to bury the Cu-based film in the trench; and
forming the Cu wiring by polishing an entire surface and removing the Cu-based film, the wetting target layer and the barrier film on a surface except the trench.
9. The semiconductor device manufacturing method of claim 8 ,
wherein the wetting target layer is formed to have a thickness of 1 nm to 5 nm.
10. The semiconductor device manufacturing method of claim 8 ,
wherein the wetting target layer is formed by CVD.
11. The semiconductor device manufacturing method of claim 8 . ,
wherein a heating temperature for heating the substrate when flowing the Cu-based seed film into the via is in a range from 200° C. to 400° C.
12. The semiconductor device manufacturing method of claim 8 . ,
wherein the Cu-based film is formed by performing ionized PVD while heating the substrate at 65° C. to 350° C.
13. The semiconductor device manufacturing method of claim 8 . ,
wherein the heating of the substrate after the forming of the Cu-based seed film and the forming of the Cu-based film are performed in a single apparatus.
14. The semiconductor device manufacturing method of claim 8 ,
wherein the forming of the Cu-based seed film, the heating of the substrate after the forming of the Cu-based seed film and the forming of the Cu-based film are performed in a single apparatus.
15. The semiconductor device manufacturing method of claim 8 , further comprising:
forming, on the Cu-based film, an additional layer made of the Cu or Cu alloy before polishing the entire surface and after burying the Cu-based film in the trench.
16. A computer-readable recording medium having stored thereon computer-executable instructions that, in response to execution, cause a Cu wiring forming system to perform a Cu wiring forming method of forming, on a substrate having on a surface thereof a film provided with a trench of a preset pattern and a via formed at a bottom of the trench, a Cu wiring by burying Cu or Cu alloy in the trench and the via,
wherein the Cu wiring forming method comprises:
forming a barrier film on a surface of the film;
forming, on a surface of the barrier film, a wetting target layer made of Ru or Co to be wet with the Cu or Cu alloy;
forming, on a surface of the wetting target layer, a Cu-based seed film made of the Cu or Cu alloy and having a thickness corresponding to an amount for filling only the via by PVD;
filling the via by heating the substrate on which the Cu-based seed film is already formed and flowing the Cu-based seed film into the via so as to expose surface portions of the wetting target layer excluding the via; and
forming, on the surface of the substrate on which the via is already filled, a Cu-based film made of the Cu or Cu alloy by PVD under a condition that allows the Cu-based film to be flown on the wetting target layer to bury the Cu-based film in the trench.