IP Library Granted Patent US 10,090,464
Granted Patent B2
US 10,090,464 · App. 15/606,624 · Granted Oct 2, 2018

Buried low-resistance metal word lines for cross-point variable-resistance material memories

Inventors: Jun Liu (Boise, ID); Michael P. Violette (Boise, ID)
Assignee: Micron Technology, Inc.
H01L45/1608G11C13/0004H01L27/101H01L27/24H01L27/2409H01L45/06H01L45/1233H01L45/1253H01L45/142H01L45/143H01L45/144G11C2213/72
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Quick Facts
Patent No.
US 10,090,464
App. No.
15/606,624
Granted
Oct 2, 2018
Kind
B2
Abstract

Variable-resistance material memories include a buried salicide word line disposed below a diode. Variable-resistance material memories include a metal spacer spaced apart and next to the diode. Processes include the formation of one of the buried salicide word line and the metal spacer. Devices include the variable-resistance material memories and one of the buried salicided word line and the spacer word line.

Claims (26)

1. A process of forming a memory structure, comprising:

forming a first recess in an upper semiconductive substrate by use of a hard mask, wherein the upper semiconductive substrate is disposed above a lower semiconductive substrate;

forming a temporary spacer in the first recess;

forming a second recess that penetrates into the lower semiconductive substrate, and that forms a pillar in the upper semiconductive substrate;

forming a buried oxide in the lower semiconductive substrate and in the pillar;

removing the temporary spacer;

forming a nitride first spacer on the pillar;

forming a metal second spacer on the nitride first spacer;

forming a shallow trench isolation adjacent the pillar;

forming a diode in a recess of the hard mask that exposes the pillar at an upper surface thereof: and

forming a variable-resistance material coupled to the diode.

2. The process of claim 1 , wherein forming the diode in the recess of the hard mask that exposes the pillar at the upper surface thereof includes:

etching the hard mask to form the recess in the hard mask;

forming an epitaxial first film above and on the pillar at the uppersurface; and

forming a second film above and on the epitaxial first film.

3. The process of claim 2 , wherein forming the variable-resistance material that is coupled to the diode includes:

siliciding a portion of the second film to form a suicide contact;

forming a bottom electrode on the silicide contact;

forming the variable-resistance material on the bottom electrode; and

forming a top electrode on the variable-resistance material.

4. The process of claim 1 , wherein the variable-resistance material is selected from an alloy, a quasi-metal composition, a metal oxide, and a chalcogenide.

5. The process of claim 1 , wherein the variable-resistance material includes a phase-change material.

6. The process of claim I, wherein the variable-resistance material includes one or more of a gallium-containing material, a germanium-containing material, an indium-containing material, an antimony-containing material, a tellurium-containing material, a selenium-containing material, an arsenic-containing material, an aluminum-containing material, a tin-containing material, a palladium-containing material, a silver-containing material, or a colossal magneto-resistive film.

7. The process of claim I, wherein the variable-resistance material includes a doped chalcogenide glass of the general formula A x B y , B selected from sulfur, selenium, and tellurium, and mixtures thereof, and A includes at least one element from Group III-A, Group IV-A, Group V-A, or Group VI -A of the periodic table.

8. The process of claim 3 , wherein the silicide contact includes cobalt silicide.

9. The process of claim 1 , wherein a silicide contact is formed in direct contact with the diode.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050700/0535 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0393 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 5 TO PATENT SECURITY AGREEMENT Recorded Aug 8, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 043482/0776 →
SUPPLEMENT NO. 5 TO PATENT SECURITY AGREEMENT Recorded Aug 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION
Reel/Frame 043483/0686 →
Continuity (3)
Division 14844747 · Sep 3, 2015
Division 11857682 · Sep 19, 2007
Related Publication 20170263865A1 · Sep 14, 2017