Thermally optimized phase change memory cells and methods of fabricating the same
A thermally optimized phase change memory cell includes a phase change material element disposed between first and second electrodes. The second electrode includes a thermally insulating region having a first thermal resistivity over the first electrode and a metallic contact region interposed between the phase change material element and the thermally insulating region, where the metallic contact layer has a second thermal resistivity lower than the first thermal resistivity.
1. An electronic device comprising:
a plurality of memory elements, at least two memory elements of the plurality of memory elements each comprising:
a first electrode;
a chalcogenide material element located on the first electrode, wherein the chalcogenide material element is a selector node of a memory cell, wherein a storage node is electrically coupled to the selector node through the first electrode; and
a second electrode located on the chalcogenide material element, the second electrode comprising a thermally insulating carbon region having a first thermal resistivity and a metallic contact region located between the chalcogenide material element and the thermally insulating carbon region, the metallic contact region having a second thermal resistivity lower than the first thermal resistivity; and
a metallic access line coupled with the thermally insulating carbon region of the at least two memory elements.
2. The electronic device of claim 1 , wherein an electrical resistance of a bulk material of the chalcogenide material element is greater than a combined electrical resistance of a bulk material of the thermally insulating carbon region, a bulk material of the metallic contact region and an interface between the metallic contact region and the chalcogenide material element.
3. The electronic device of claim 1 , wherein the at least two memory elements comprise a first memory element and a second memory element that is adjacent to the first memory element, and further comprising:
a sidewall insulator located between the first memory element and the second memory element having at least two sidewall layers.
4. The electronic device of claim 3 , wherein the at least two sidewall layers comprise:
a first sidewall layer that is in contact with the first memory element and a second sidewall layer that is interposed between the first sidewall layer and the second memory element, wherein the first sidewall layer has a different material composition than the second sidewall layer.
5. The electronic device of claim 4 , wherein the first sidewall layer has at least one atomic element that is different than the second sidewall layer.
6. The electronic device of claim 4 , wherein a material of one or more of the first sidewall layer or the second sidewall layer is an oxide, a nitride, or a carbide material.
7. The electronic device of claim 4 , wherein a material of the first sidewall layer is selected from a group consisting of SiO2, ZrO2, HfO2, Al2O3, NiO, TiO2, Ta2O5, ThO2, HfSiO4, ZrSiO4, Mg2SiO4, MgO, BeO, and oxides of lanthanide series.
8. The electronic device of claim 7 , wherein a material of the second sidewall layer is selected from a group consisting of Si3N4 and SiC.
9. The electronic device of claim 3 , wherein the at least two sidewall layers comprise:
at least three sidewall layers having alternating material compositions.
10. The electronic device of claim 3 , wherein the at least two sidewall layers comprise:
at least three sidewall layers each having different material compositions.
11. The electronic device of claim 3 , wherein the at least two sidewall layers have a nominal thickness between 1 nm and 10 nm.
12. The electronic device of claim 3 , wherein the at least two sidewall layers comprise:
a first sidewall layer that is in contact with the first memory element and a second sidewall layer that is interposed between the first sidewall layer and the second memory element, wherein the first sidewall layer having a same nominal thickness as the second sidewall layer.
13. The electronic device of claim 3 , wherein the at least two sidewall layers comprise:
a first sidewall layer that is in contact with the first memory element and a second sidewall layer that is interposed between the first sidewall layer and the second memory element, wherein the first sidewall layer having a nominal thickness that is substantially different than the second sidewall layer.
14. The electronic device of claim 1 , wherein the chalcogenide material element comprises a chalcogenide material and the second thermal resistivity is lower than the first thermal resistivity by a ratio of at least 10.
15. The electronic device of claim 1 , wherein the metallic access line is disposed on the second electrode and extends in a first direction, and wherein the metallic access line and at least the second electrode have a same nominal width measured in a second direction different from the first direction.
16. An electronic device comprising:
a first electrode;
a chalcogenide material element located on the first electrode, wherein the chalcogenide material element is a selector node of a memory cell, wherein a storage node is electrically coupled to the selector node through the first electrode;
a second electrode located on the chalcogenide material element, the second electrode comprising a thermally insulating carbon region having a first thermal resistivity and a metallic contact region located between the chalcogenide material element and the thermally insulating carbon region, the metallic contact region having a second thermal resistivity lower than the first thermal resistivity; and
a sidewall insulator in contact with the first electrode, the chalcogenide material element, and the second electrode, the sidewall insulator comprising a plurality of sidewall insulating layers.
17. The electronic device of claim 16 , wherein an electrical resistance of a bulk material of the chalcogenide material element is greater than a combined electrical resistance of a bulk material of the thermally insulating carbon region, a bulk material of the metallic contact region and an interface between the metallic contact region and the chalcogenide material element.
18. An electronic device comprising:
a first electrode;
a chalcogenide material element located on the first electrode;
a second electrode located on the chalcogenide material element, the second electrode comprising a thermally insulating region and a metallic contact region interposed between the chalcogenide material element and the thermally insulating region; and
an access line disposed on the second electrode and extending in a first direction, wherein the access line and at least the second electrode have a same nominal width measured in a second direction crossing the first direction.
19. The electronic device of claim 18 , wherein the thermally insulating region comprises carbon and has a first thermal resistivity, and wherein the metallic contact region has a second thermal resistivity lower than the first thermal resistivity.
20. The electronic device of claim 18 , further comprising:
a sidewall insulator in contact with the first electrode, the chalcogenide material element, and the second electrode, the sidewall insulator comprising a plurality of sidewall insulating layers.