System and method for adaptive command fetch aggregation
View Patent ↗Systems and methods for adaptive fetch coalescing are disclosed. NVM Express (NVMe) implements a paired submission queue and completion queue mechanism, with host software on the host device placing commands into the submission queue. The host device notifies the memory device, via a doorbell update, of commands on the submission queue. Instead of fetching the command responsive to the doorbell update, the memory device may analyze one or more aspects in order to determine whether and how to coalesce fetching of the commands. In this way, the memory device may include the intelligence to coalesce fetching in order to more efficiently fetch the commands from the host device.
1. A method comprising:
receiving an indication from a host device of one or more commands available for fetching from at least one submission queue, the host device having caused the one or more commands to be stored on the at least one submission queue for a memory device to process; and
responsive to receiving the indication, the memory device:
accessing a fetching threshold, the fetching threshold indicative of a number of commands or a wait time;
determining whether the fetching threshold is met, wherein determining whether the fetching threshold is met comprises determining whether the one or more commands available for fetching is greater than or equal to the fetching threshold;
in response to determining that the fetching threshold is met, fetching the one or more commands from the at least one submission queue; and
in response to determining that the fetching threshold is not met, waiting to fetch the one or more commands from the at least one submission queue.
2. The method of claim 1 , wherein:
the fetching threshold is indicative of a number of commands.
3. The method of claim 1 , wherein:
the fetching threshold is indicative of a wait time; and
determining whether the fetching threshold is met comprises determining whether a time since a last fetch for commands is greater than or equal to the fetching threshold.
4. The method of claim 1 , further comprising analyzing at least one aspect of a communication interface between the host device and the memory device to dynamically determine the fetching threshold.
5. The method of claim 4 , wherein analyzing at least one aspect of the communication interface comprises analyzing a busyness of the communication interface.
6. The method of claim 1 , further comprising:
analyzing patterns between different indications from the host device; and
selecting the fetching threshold based on the analysis.
7. The method of claim 1 , further comprising:
determining processing capacity of the memory device; and
determining, based on the determined processing capacity, whether to require that a number of commands for fetching be greater than or equal to the fetching threshold before fetching the one or more commands from the at least one submission queue.
8. The method of claim 7 , wherein:
in response to determining that the memory device has higher processing capacity, determining not to require that the number of commands for fetching be greater than or equal to the fetching threshold before fetching the one or more commands from the at least one submission queue; and
in response to determining that the memory device has lower processing capacity, determining to require that the number of commands for fetching be greater than or equal to the fetching threshold before fetching the one or more commands from the at least one submission queue.
9. The method of claim 1 , further comprising dynamically determining, by the memory device, the fetching threshold.
10. The method of claim 9 , wherein the memory device dynamically determines the fetching threshold based on an analysis, by the memory device, of a number of commands requested to be fetched in previously received indications from the host device.
11. The method of claim 9 , wherein the memory device dynamically determines the fetching threshold based on a number of outstanding host device requests.
12. A non-volatile memory device comprising:
a non-volatile memory;
a communication interface configured to communicate with a host device; and
a controller in communication with the non-volatile memory and the communication interface, the controller configured to:
prior to receiving an indication from the host device, analyze one or more aspects related to at least one submission queue, the host device having caused commands to be stored on the at least one submission queue for the memory device to process;
prior to receiving the indication from the host device, determine, based on the analysis of the one or more aspects, one or more fetching criteria, the fetching criteria indicative of when the memory device is to fetch commands from the at least one submission queue;
receive the indication from the host device of one or more commands available for fetching from the at least one submission queue; and
responsive to receiving the indication:
determine whether the one or more fetching criteria has been met;
in response to determining that the one or more fetching criteria has been met, fetch the one or more commands from the at least one submission queue; and
in response to determining that the one or more fetching criteria has not been met, wait to fetch the one or more commands from the at least one submission queue.
13. The memory device of claim 12 , wherein:
the controller is configured to analyze the one or more aspects related to the at least one submission queue by analyzing patterns between different indications from the host device;
the one or more fetching criteria comprises a wait time; and
in response to receiving the indication, the controller is configured to wait, based on the wait time, before fetching the one or more commands from the at least one submission queue.
14. The memory device of claim 12 , wherein:
the controller is configured to analyze the one or more aspects related to the at least one submission queue by analyzing busyness of a bus between the host device and the memory device;
and the one or more fetching criteria is based on the busyness of the bus.
15. The memory device of claim 12 , wherein:
the controller is configured to analyze the one or more aspects related to the at least one submission queue by determining a number of commands from the at least one submission queue currently being processed by the memory device; and
the one or more fetching criteria is based on the number of commands from the at least one submission queue currently being processed by the memory device.
16. The memory device of claim 12 , wherein the controller is configured to analyze at least one aspect of the host device to determine the one or more fetching criteria.
17. The memory device of claim 12 , wherein the controller is configured to:
in response to receiving the indication from the host device, analyze the one or more aspects and determine the one or more fetching criteria.
18. A non-volatile memory device comprising:
means for receiving an indication from a host device of one or more commands available for fetching from at least one submission queue, the host device having caused the one or more commands to be stored on the at least one submission queue for the memory device to process; and
responsive to receiving the indication:
means for accessing a fetching threshold, the fetching threshold indicative of a number of commands or a wait time;
means for determining whether the fetching threshold is met, wherein the means for determining whether the fetching threshold is met comprises means for determining whether the one or more commands available for fetching is greater than or equal to the fetching threshold;
in response to determining that the fetching threshold is met, means for fetching the one or more commands from the at least one submission queue; and
in response to determining that the number of commands for fetching is greater than or equal to a fetching threshold, means for waiting to fetch the one or more commands from the at least one submission queue.
19. The memory device of claim 18 , wherein:
the fetching threshold is indicative of a number of commands.
20. The memory device of claim 18 , wherein:
the fetching threshold is indicative of a wait time; and
the means for determining whether the fetching threshold is met comprises means for determining whether a time since a last fetch for commands is greater than or equal to the fetching threshold.