System and method for using host command data buffers as extended memory device volatile memory
View Patent ↗Systems and methods for using host command data buffers as extended memory device volatile memory are disclosed. NVM Express implements a paired submission queue and completion queue mechanism, with host software on the host device placing commands into the submission queue. Commands may include an indication of a host buffer, resident on the host device, in which to store data for access by the host device. The memory device may use the host buffer as extended memory during execution of the command. As one example, the memory device may process the command in stages, with each stage retrieving data from the host buffer, manipulating the data, and writing the processed data to the same host buffer. As another example, the host buffer can be used for memory device internal relocation and garbage collection operations. Thus, the area/cost of the memory device controller is reduced since less volatile memory is required.
1. A method comprising:
in a memory device:
receiving, from a host device, one or more notifications indicative of a host command and of a host buffer in the host device for the memory device to use responsive to executing the host command, wherein execution by the memory device of the host command is performed in at least a first stage and a second stage;
performing the first stage to generate first stage data;
causing the first stage data to be stored in the host buffer;
causing the first stage data to be transferred from the host buffer back to the memory device;
performing, using the first stage data transferred from the host buffer, the second stage to generate second stage data;
causing the second stage data to be stored in the host buffer; and
notifying the host device of completion of execution of the host command.
2. The method of claim 1 , wherein:
the host command comprises a read command;
the memory device is configured to cause the second stage data to be stored in the host buffer responsive to executing the host command; and
notifying the host device of completion of execution of the host command that indicates to the host device to read the second stage data from the host buffer.
3. The method of claim 2 , wherein the first stage comprises reading data from non-volatile memory in the memory device.
4. The method of claim 3 , wherein the second stage comprises error correction.
5. The method of claim 4 , wherein:
execution by the memory device of the host command comprises multiple error correction stages; and
after each error correction stage, the memory device causes data resulting from each error correction stage to be stored in the host buffer.
6. The method of claim 1 , wherein:
the host command comprises a write command; and
the memory device is configured to read data from the host buffer to store the read data in non-volatile memory in the memory device.
7. The method of claim 1 , wherein the host command comprises a Non-Volatile Memory Express (NVMe) command.
8. The method of claim 1 , wherein performing the first stage to generate first stage data comprises using one or more transfer buffers to store the first stage data prior to causing the first stage data to be transferred from the one or more transfer buffers to the host buffer.
9. The method of claim 8 , wherein:
performing the second stage to generate second stage data comprises using the one or more transfer buffers to store the first stage data transferred from the host buffer; and
causing the second stage data to be stored in the host buffer comprises using the one or more transfer buffers to store the second stage data prior to causing the second stage data to be transferred from the one or more transfer buffers to the host buffer.
10. A memory device comprising:
a communication interface configured to communicate with a host device;
non-volatile memory;
volatile memory; and
a controller configured to communicate with the communication interface, the non-volatile memory, and the volatile memory, the controller further configured to:
receive, from the host device via the communication interface, one or more notifications indicative of a read command and of a host buffer in the host device for the memory device to cause data, read responsive to the read command, to be stored therein;
read, from the non-volatile memory, the data responsive to the read command;
store the read data in the volatile memory;
after storing the read data in the volatile memory, cause the read data stored in the volatile memory to be stored in the host buffer;
cause transfer of the read data from the host buffer back to the volatile memory;
perform at least one additional operation on the read data transferred from the host buffer back to the volatile memory to generate modified data; and
cause transfer of the modified data to the host buffer.
11. The memory device of claim 10 , wherein:
the at least one additional operation comprises one or more error correction operations; and
the modified data comprises error-corrected data.
12. The memory device of claim 11 , wherein the controller is further configured to:
after causing the transfer of the error-corrected data to the host buffer, notify the host device of completion of execution of the read command,
wherein the notification indicates to the host device to read the error-corrected data stored in the host buffer.
13. The memory device of claim 10 , wherein:
the at least one additional operation comprises an encryption operation or a decryption operation; and
the modified data comprises crypto-data.
14. The memory device of claim 10 , wherein the volatile memory comprises one or more transfer buffers.
15. A memory device comprising:
a communication interface configured to communicate with a host device;
non-volatile memory; and
a controller configured to communicate with the communication interface and the non-volatile memory, the controller further configured to:
receive, from the host device via the communication interface, one or more notifications indicative of a host command and of a host buffer in the host device for the memory device to use responsive to executing the host command, to be stored therein, the host buffer for use by the memory device until the memory device notifies the host device of completion of execution of the host command;
responsive to receiving the one or more notifications, determine an internal operation to perform using the host buffer, the internal operation comprising an operation internal to the memory device for management of the non-volatile memory;
cause data to be stored to and read from the host buffer to perform the internal operation;
after causing data to be stored to and read from the host buffer to perform the internal operation, cause command execution data to be stored to the host buffer, the command execution data responsive to executing the host command; and
after causing the command execution data to be stored to the host buffer, send a notification to the host device of completion of execution of the host command for the host device to read the command execution data from the host buffer.
16. The memory device of claim 15 , wherein:
the memory device is configured to send the notification to the host device of completion of execution of the host command within a timeout period; and
the controller is configured to determine the internal operation to perform using the host buffer by selecting the internal operation that is completed within the timeout period.
17. The memory device of claim 15 , wherein the internal operation comprises garbage collection.
18. The memory device of claim 15 , wherein the non-volatile memory comprises a substrate formed with a three-dimensional memory structure.
19. A memory device comprising:
non-volatile memory;
means for receiving, from a host device, one or more notifications indicative of a host command and of a host buffer in the host device for the memory device to use responsive to executing the host command, to be stored therein, the host buffer for use by the memory device until the memory device notifies the host device of completion of execution of the host command;
means, responsive to receiving the one or more notifications, for determining an internal operation to perform using the host buffer, the internal operation comprising an operation internal to the memory device for management of the non-volatile memory;
means for causing data to be stored to and read from the host buffer to perform the internal operation;
means, after causing data to be stored to and read from the host buffer to perform the internal operation, for causing command execution data to be stored to the host buffer, the command execution data responsive to executing the host command; and
means, after causing the command execution data to be stored to the host buffer, for sending a notification to the host device of completion of execution of the host command for the host device to read the command execution data from the host buffer.
20. The memory device of claim 19 , wherein the internal operation comprises garbage collection.