IP Library Granted Patent US 10,290,804
Granted Patent B2
US 10,290,804 · App. 15/637,357 · Granted May 14, 2019

Nanoparticle-based resistive memory device and methods for manufacturing the same

Inventors: Ricardo Ruiz (Santa Clara, CA); Jeffrey Lille (Sunnyvale, CA); Mac D. Apodaca (San Jose, CA); Derek Stewart (Livermore, CA); Lei Wan (San Jose, CA); Bruce Terris (Sunnyvale, CA)
Assignee: SANDISK TECHNOLOGIES LLC
H01L45/1641H01L27/249H01L45/06H01L45/08H01L45/1233H01L45/1253H01L45/14H01L45/144H01L45/146H01L45/147H01L45/1608H01L21/02601H01L45/149
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Quick Facts
Patent No.
US 10,290,804
App. No.
15/637,357
Granted
May 14, 2019
Kind
B2
Abstract

Resistive memory cells containing nanoparticles are formed between two electrodes. The nanoparticles may be embedded in a matrix or sintered together without a matrix. The memory cells may be projected memory cells or barrier modulated cells. Polymeric ligands may be used to deposit the nanoparticles over a substrate, followed by an optional removal or replacement of the polymeric ligands.

Claims (75)

1. A method of fabricating a memory cell, comprising:

forming a first electrode over a substrate;

providing polymer-grafted memory material nanoparticles by dispensing a liquid dispersion including polymeric ligand-grafted nanoparticles on the first electrode, wherein the polymer-grafted memory material nanoparticles form a polymer matrix made of the polymeric ligand that embeds the memory material nanoparticles, wherein the polymer matrix is located over the first electrode; and

forming a second electrode over the polymer matrix,

wherein the memory cell comprises a resistive memory cell and the memory material nanoparticles comprise resistive memory nanoparticles; and

wherein the method comprises at least one additional processing step selected from:

a first additional processing step of removing the polymer matrix from the memory material nanoparticles before forming the second electrode; or

a second additional processing step of providing additional nanoparticles having a different composition than the nanoparticles of the polymeric ligand-grafted nanoparticle.

2. The method of claim 1 , wherein the method comprises the first additional processing step.

3. The method of claim 2 , wherein:

removing the polymer matrix comprises removing the polymeric ligands by thermal decomposition, plasma treatment or exposure to a solvent or acid vapor that detaches the polymeric ligands from the nanoparticles;

at least 50% of all nanoparticles contact another nanoparticle after removal of the polymeric ligands; and

a continuous path consisting essentially of a subset of the nanoparticles is formed between the first electrode and the second electrode after removal of the polymeric ligands.

4. The method of claim 3 , further comprising sintering the nanoparticles together after the nanoparticles collapse after removing the polymeric ligands.

5. The method of claim 2 , wherein removing the polymer matrix from the memory material nanoparticles comprises replacing the polymer matrix with an inorganic matrix using an atomic layer deposition infiltration process to induce infiltration of a precursor material into materials of the liquid dispersion, wherein the precursor material forms the matrix upon reaction with, or substitution of, a material of the polymeric ligand-grafted nanoparticles.

6. The method of claim 5 , wherein:

the nanoparticles comprise chalcogenide phase change memory material nanoparticles;

the inorganic matrix forms a projection material liner that connects the first electrode to the second electrode;

the projection material liner has a resistivity which is between low and high resistance states of the chalcogenide phase change memory material; and

the resistive memory cell comprises a projected memory cell.

7. The method of claim 5 , wherein:

the nanoparticles comprise metal oxide nanoparticles;

the inorganic matrix forms a barrier material for the metal oxide nanoparticles; and

the resistive memory cell comprises a barrier modulated cell.

8. The method of claim 1 , further comprising using an atomic layer deposition infiltration process to form an inorganic shell around each of the nanoparticles located in the polymer matrix.

9. The method of claim 8 , wherein:

the nanoparticles comprise metal oxide nanoparticles;

the inorganic shell forms a barrier material for the metal oxide nanoparticles; and

the resistive memory cell comprises a barrier modulated cell.

10. The method of claim 1 , wherein:

the nanoparticles comprise metal oxide nanoparticle cores surrounded by an inorganic barrier material shell; and

the resistive memory cell comprises a barrier modulated cell.

11. The method of claim 1 , wherein the method comprises the second additional processing step.

12. The method of claim 11 , wherein superlattices of two or more types of nanoparticles are located in the memory cell.

13. A method of fabricating a memory cell, comprising:

forming a first electrode over a substrate;

providing polymer-grafted memory material nanoparticles by dispensing a liquid dispersion including polymeric ligand-grafted nanoparticles on the first electrode, wherein the polymer-grafted memory material nanoparticles form a polymer matrix made of the polymeric ligand that embeds the memory material nanoparticles, wherein the polymer matrix is located over the first electrode; and

forming a second electrode over the polymer matrix,

wherein the memory cell comprises a resistive memory cell and the memory material nanoparticles comprise resistive memory nanoparticles; and

wherein the method comprises at least one feature selected from:

a first feature that the nanoparticles are embedded in the polymer matrix after forming the second electrode; or

a second feature that the first electrode is formed as a planar layer, the liquid dispersion is dispersed on a top surface of the first electrode, a thickness of the liquid dispersion is less than twice a maximum dimension of the ligand-grafted nanoparticles, and the second electrode is formed on the variable resistance region.

14. The method of claim 13 , wherein the method comprises the first feature.

15. The method of claim 13 , wherein the method comprises the second feature.

16. The method of claim 13 , further comprising using an atomic layer deposition infiltration process to form an inorganic shell around each of the nanoparticles located in the polymer matrix.

17. The method of claim 16 , wherein:

the nanoparticles comprise metal oxide nanoparticles;

the inorganic shell forms a barrier material for the metal oxide nanoparticles; and

the resistive memory cell comprises a barrier modulated cell.

18. The method of claim 13 , wherein:

the nanoparticles comprise metal oxide nanoparticle cores surrounded by an inorganic barrier material shell; and

the resistive memory cell comprises a barrier modulated cell.

19. A method of fabricating a memory cell, comprising:

forming a first electrode over a substrate;

providing polymer-grafted memory material nanoparticles by dispensing a liquid dispersion including polymeric ligand-grafted nanoparticles on the first electrode, wherein the polymer-grafted memory material nanoparticles form a polymer matrix made of the polymeric ligand that embeds the memory material nanoparticles, wherein the polymer matrix is located over the first electrode; and

forming a second electrode over the polymer matrix,

wherein the memory cell comprises a resistive memory cell and the memory material nanoparticles comprise resistive memory nanoparticles; and

wherein the method comprises at least one additional set of processing steps selected from:

a first set of processing steps comprising:

forming an insulating layer over a top surface of the first electrode, and

forming an opening extending through the insulating layer, wherein a top surface of the first electrode is physically exposed at a bottom of the opening, the liquid dispersion is dispensed in the opening, and the second electrode is formed on a top surface of the insulating layer; or

a second set of processing steps comprising:

forming an alternating stack of insulating layers and electrically conductive layers over the substrate, wherein the first electrode is one of the electrically conductive layers, and

forming an opening extending through the alternating stack, wherein a sidewall of the first electrode is physically exposed in the opening, the liquid dispersion is dispensed in the opening and directly on the sidewall of the first electrode, and the second electrode is formed through the variable resistance region at a center portion of the opening.

20. The method of claim 19 , wherein the method comprises the first set of processing steps.

21. The method of claim 20 , wherein the opening includes a constriction zone having a horizontal cross-sectional area that is less than a horizontal cross-sectional area of a top periphery of the opening and is less than a horizontal cross-sectional area of a bottom periphery of the opening.

22. The method of claim 19 , wherein the method comprises the second set of processing steps.

23. The method of claim 19 , further comprising using an atomic layer deposition infiltration process to form an inorganic shell around each of the nanoparticles located in the polymer matrix.

24. The method of claim 23 , wherein:

the nanoparticles comprise metal oxide nanoparticles;

the inorganic shell forms a barrier material for the metal oxide nanoparticles; and

the resistive memory cell comprises a barrier modulated cell.

25. The method of claim 19 , wherein:

the nanoparticles comprise metal oxide nanoparticle cores surrounded by an inorganic barrier material shell; and

the resistive memory cell comprises a barrier modulated cell.

Assignments (4)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2017
From: RUIZ, RICARDO; LILLE, JEFFREY; APODACA, MAC D.; STEWART, DEREK; WAN, LEI; TERRIS, BRUCE
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 042882/0142 →
Continuity (2)
Provisional Application 62449351 · Jan 23, 2017
Related Publication 20180212147A1 · Jul 26, 2018