IP Library Granted Patent US 10,083,839
Granted Patent B2
US 10,083,839 · App. 15/647,689 · Granted Sep 25, 2018

Sidewall image transfer (SIT) methods with localized oxidation enhancement of sacrificial mandrel sidewall by ion beam exposure

Inventor: Kangguo Cheng (Schenectady, NY)
Assignee: International Business Machines Corporation
H01L21/3088H01L21/3065H01L21/3081H01L21/3085H01L21/3086H01L29/66818H01L29/7851
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Quick Facts
Patent No.
US 10,083,839
App. No.
15/647,689
Granted
Sep 25, 2018
Kind
B2
Abstract

A method of fabricating semiconductor fins, including, patterning a film stack to produce one or more sacrificial mandrels having sidewalls, exposing the sidewall on one side of the one or more sacrificial mandrels to an ion beam to make the exposed sidewall more susceptible to oxidation, oxidizing the opposite sidewalls of the one or more sacrificial mandrels to form a plurality of oxide pillars, removing the one or more sacrificial mandrels, forming spacers on opposite sides of each of the plurality of oxide pillars to produce a spacer pattern, removing the plurality of oxide pillars, and transferring the spacer pattern to the substrate to produce a plurality of fins.

Claims (42)

1. A method of fabricating semiconductor fins, comprising:

patterning a film stack to produce one or more sacrificial mandrels having sidewalls;

exposing the sidewall on one side of the one or more sacrificial mandrels to an ion beam to make the exposed sidewall more susceptible to oxidation;

oxidizing the opposite sidewalls of the one or more sacrificial mandrels to form a plurality of oxide pillars, wherein a portion of each sidewall that is more susceptible to oxidation remains after forming the plurality of oxide pillars;

removing the one or more sacrificial mandrels;

forming spacers on opposite sides of each of the plurality of oxide pillars to produce a spacer pattern;

removing the plurality of oxide pillars; and

transferring the spacer pattern to the substrate to produce a plurality of fins.

2. The method of claim 1 , wherein the one or more sacrificial mandrels are amorphous silicon.

3. The method of claim 1 , wherein the ion beam impinges the sidewall on one side of the one or more sacrificial mandrels at an angle that shadows the opposite sidewall of the one or more sacrificial mandrels.

4. The method of claim 1 , wherein the oxide pillars formed from opposite sidewalls of the one or more sacrificial mandrels have different widths.

5. The method of claim 1 , which further comprises forming trenches having varying depths between the plurality of fins.

6. The method of claim 1 , wherein the plurality of fins have a predefined pitch.

7. The method of claim 1 , wherein the spacers are formed by conformal deposition on at least opposite sides of each of the plurality of oxide pillars.

8. The method of claim 7 , wherein the spacers are amorphous carbon.

9. The method of claim 1 , wherein the sidewall on one side of the one or more sacrificial mandrels is exposed to an ion beam comprising a p-type dopant.

10. The method of claim 9 , wherein the p-type dopant is boron and the sacrificial mandrels are amorphous silicon.

11. A method of fabricating semiconductor fins, comprising:

forming a film stack on a substrate, where the film stack includes

a nitride layer directly on the substrate,

an oxide layer directly on the nitride layer,

a sacrificial mandrel layer directly on the oxide layer,

and a capping layer on the sacrificial mandrel layer;

patterning the capping layer and sacrificial mandrel layer to produce one or more sacrificial mandrels having sidewalls;

exposing the sidewall on one side of each of the one or more sacrificial mandrels to an ion beam to make the exposed sidewall more susceptible to oxidation;

oxidizing the sidewalls of the one or more sacrificial mandrels to form a plurality of oxide pillars;

removing the one or more sacrificial mandrels; and

forming spacers on opposite sides of each of the plurality of oxide pillars to produce a spacer pattern.

12. The method of claim 11 , which further comprises removing the plurality of oxide pillars, and etching the substrate.

13. The method of claim 11 , wherein the sacrificial mandrels have a width in the range of about 20 nm to about 400 nm.

14. The method of claim 11 , wherein the oxide pillars on an ion-exposed sidewall of the sacrificial mandrels have a width in the range of about 15 nm to about 60 nm.

15. The method of claim 11 , wherein the spacers have a width in the range of about 5 nm to about 20 nm.

16. The method of claim 11 , wherein the spacer pattern is transferred to the substrate to form a plurality of fins for forming FinFETs.

17. The method of claim 16 , wherein the spacer pattern has a predetermined pitch, P 1 , between two spacers and a predetermined pitch, P 2 , between two spacers, wherein P 2 ≠N×P 1 , and N is an integer.

18. A method of forming an intermediate fin field effect transistor (FinFET) structure, comprising:

forming a nitride layer directly on a semiconductor substrate;

forming an oxide layer directly on the nitride layer;

forming a sacrificial mandrel directly on the oxide layer, wherein the sacrificial mandrel has a width in the range of about 20 nm to about 400 nm; and

exposing the sidewall on one side of the sacrificial mandrel to an ion beam to make the exposed sidewall more susceptible to oxidation;

forming a first oxide pillar on a first side of the sacrificial mandrel and a second oxide pillar on the opposite side of the sacrificial mandrel, wherein the first oxide pillar has a width in the range of about 15 nm to about 60 nm, and the second oxide pillar has a width in the range of about 10 nm to about 30 nm.

19. The method of claim 18 , wherein the sacrificial mandrel is amorphous silicon, and the first oxide pillar and second oxide pillar are silicon oxide.

20. The method of claim 18 , wherein the ion beam includes a p-type dopant.

Assignments (5)
CHANGE OF NAME Recorded Sep 27, 2024
From: TESSERA LLC
To: ADEIA SEMICONDUCTOR SOLUTIONS LLC
Reel/Frame 069067/0454 →
CHANGE OF NAME Recorded Apr 29, 2022
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 059835/0051 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: TESSERA, INC.
Reel/Frame 051493/0546 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2017
From: CHENG, KANGGUO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 042987/0228 →
Continuity (2)
Continuation 15077538 · Mar 22, 2016
Related Publication 20170316951A1 · Nov 2, 2017