IP Library Granted Patent US 9,991,383
Granted Patent B2
US 9,991,383 · App. 15/658,950 · Granted Jun 5, 2018

Semiconductor component and manufacturing method thereof

Inventor: Koichi Amari (Kanagawa, JP)
Assignee: SONY CORPORATION
H01L29/7834H01L29/4236H01L29/66545H01L29/66666H01L29/7827H01L29/7843
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Quick Facts
Patent No.
US 9,991,383
App. No.
15/658,950
Granted
Jun 5, 2018
Kind
B2
Abstract

A semiconductor component including: a semiconductor substrate; and a semiconductor device provided thereon, the device being a field-effect transistor that includes: a gate insulating film provided on the substrate; a gate electrode provided via the film; and a pair of source-drain regions provided to sandwich the electrode, the substrate including a patterned surface in a portion where the electrode is provided, the patterned surface of the substrate including a raised portion where the film is formed to cover a surface that lies on the same plane as a surface of the pair of source-drain regions, and the electrode is formed on a top surface of the film, and the patterned surface of the substrate including a recessed portion where the film is formed to cover surfaces of a groove formed toward the interior than the surface of the pair of source-drain regions, and the electrode is formed so as to fill the groove provided with the film.

Claims (43)

1. A semiconductor component comprising:

an element isolation region; and

in a cross section of a gate width direction,

a semiconductor substrate with a top surface;

a plurality of grooves formed on or over the top surface of the semiconductor substrate to form a patterned surface with a plurality of raised portions and a plurality of recessed portions, the recessed portions being bottoms of the grooves;

an insulating film on or over the raised portions and the recessed portions, a part of the insulating film being formed in the grooves;

a metallic material on or over the raised portions and the recessed portions, a part of the metallic material being formed in the grooves,

wherein,

the insulating film on or over the raised portions has a function of a gate insulating film, and

the metallic material over the gate insulating film has a function of a gate electrode, and

the element isolation region includes a top surface which is higher than a height of the raised portions and a height of the recessed portions.

2. The semiconductor component according to claim 1 , wherein the metallic material includes W.

3. The semiconductor component according to claim 2 , wherein the metallic material further includes TiN.

4. The semiconductor component according to claim 3 , wherein W and TiN are laminated to form the metallic material.

5. The semiconductor component according to claim 4 , further comprising source and drain regions at the top surface of the semiconductor substrate, wherein the gate electrode is sandwiched between source and drain regions.

6. The semiconductor component according to claim 5 , wherein the grooves extend into the semiconductor substrate to a same depth to which the source and drain regions extend into the semiconductor substrate.

7. The semiconductor component according to claim 1 , wherein the gate electrode is formed by embedding the grooves.

8. The semiconductor component according to claim 1 , wherein a width of one of the raised portions is wider than a width of another of the recessed portions.

9. The semiconductor component according to claim 8 , wherein the width of one of the recessed portions is narrower than a depth of one of the grooves.

10. The semiconductor component according to claim 9 , wherein the one of the grooves includes a slanted side surface with respect to a depth direction of the semiconductor substrate.

11. The semiconductor component according to claim 1 , wherein the top surface of the element isolation region is higher than a top surface of source-drain regions.

12. The semiconductor component according to claim 1 , wherein part of the metallic material fills the grooves complimentary.

13. A semiconductor component comprising:

an element isolation region; and

in a cross section of a gate width direction,

a semiconductor substrate with a top surface;

a plurality of grooves formed on or over the top surface of the semiconductor substrate to form a patterned surface with a plurality of raised portions and a plurality of recessed portions, the recessed portions being bottoms of the grooves;

a gate insulating film on or over the raised portions and the recessed portions, a part of the gate insulating film being formed in the grooves;

a gate electrode on or over the raised portions and the recessed portions, a part of the gate electrode being formed in the grooves,

wherein,

the gate electrode comprises a metallic material, and

the element isolation region includes a top surface which is higher than a height of the raised portions and a height of the recessed portions.

14. The semiconductor component according to claim 13 , wherein the gate electrode includes W.

15. The semiconductor component according to claim 14 , wherein the gate electrode further includes TiN.

16. The semiconductor component according to claim 15 , wherein W and TiN are laminated to form the gate electrode.

17. The semiconductor component according to claim 16 , further comprising source and drain regions at the top surface of the semiconductor substrate, wherein the raised portions are sandwiched between source and drain regions.

18. The semiconductor component according to claim 17 , wherein the grooves extend into the semiconductor substrate to a same depth to which the source and drain regions extend into the semiconductor substrate.

19. The semiconductor component according to claim 13 , wherein the gate electrode is formed by embedding the grooves.

20. The semiconductor component according to claim 13 , wherein a width of one of the raised portions is wider than a width of another of the recessed portions.

21. The semiconductor component according to claim 20 , wherein the width of one of the recessed portions is narrower than a depth of one of the grooves.

22. The semiconductor component according to claim 21 , wherein the one of the grooves includes a slanted side surface with respect to a depth direction of the semiconductor substrate.

23. The semiconductor component according to claim 13 , wherein the top surface of the element isolation region is higher than a top surface of source-drain regions.

24. The semiconductor component according to claim 13 , wherein part of the gate electrode fills the grooves complimentary.

Priority Claims (1)
JP 2009-298319 · Dec 28, 2009 · national
Continuity (4)
Continuation 15371826 · Dec 7, 2016
Continuation 14573771 · Dec 17, 2014
Continuation 12967857 · Dec 14, 2010
Related Publication 20170330967A1 · Nov 16, 2017