IP Library Granted Patent US 10,379,758
Granted Patent B2
US 10,379,758 · App. 15/664,667 · Granted Aug 13, 2019

Managing system data for a data storage system

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Quick Facts
Patent No.
US 10,379,758
App. No.
15/664,667
Granted
Aug 13, 2019
Kind
B2
Abstract

The subject technology provides for managing a data storage system. A host write command to write host data associated with a logical address to a non-volatile memory is received. A first physical address in the non-volatile memory mapped to the logical address in an address mapping table is determined. An indicator that the first physical address is bad checked. If the first physical address is indicated as bad, a valid count associated with a first set of physical addresses at a current value is maintained. The first set of physical addresses comprises the first physical address. If the first physical address is not indicated as bad, the first physical address is marked as invalid. The valid count associated with the first set of physical addresses is decremented.

Claims (51)

1. A method comprising: receiving a host write command to write host data associated with a logical address to a non-volatile memory;

determining a first physical address in the non-volatile memory mapped to the logical address in an address mapping table;

checking for an indicator that the first physical address is bad;

if the first physical address is indicated as bad, maintaining a valid count associated with a first set of physical addresses at a current value, wherein the first set of physical addresses comprises the first physical address, and wherein the first physical address indicated as bad is indicative of a read failure occurrence with the first physical address; and

if the first physical address is not indicated as bad, marking the first physical address as invalid and decrementing the valid count associated with the first set of physical addresses.

2. The method of claim 1 , further comprising:

initiating a write operation to write the host data associated with the logical address to a second physical address in the non-volatile memory; and

updating the address mapping table to map the logical address to the second physical address.

3. The method of claim 2 , wherein the write operation writes metadata comprising the logical address to the second physical address with the host data associated with the logical address.

4. The method of claim 1 , wherein checking for the indicator comprises checking a bit corresponding to the first physical address in a bit mask, wherein the first physical address is indicated as bad if the bit is set.

5. The method of claim 4 , further comprising setting the bit in the bit mask in response to an error occurring during a read operation to read data written to the first physical address.

6. The method of claim 1 , wherein the non-volatile memory comprises a plurality of non-volatile memory devices, and wherein the first set of physical addresses comprises a respective physical address in each of the plurality of non-volatile memory devices.

7. The method of claim 1 , further comprising:

determining the valid count associated with the first set of physical address is zero; and

designating the first set of physical addresses for erase operations.

8. A data storage system comprising:

means for receiving a host write command to write host data associated with a logical address to a non-volatile memory;

means for determining a first physical address in the non-volatile memory mapped to the logical address in an address mapping table;

means for checking for an indicator that the first physical address is bad;

if the first physical address is indicated as bad, means for maintaining a valid count associated with a first set of physical addresses at a current value, wherein the first set of physical addresses comprises the first physical address, and wherein the first physical address indicated as bad is indicative of a read failure occurrence with the first physical address; and

if the first physical address is not indicated as bad, means for marking the first physical address as invalid and decrementing the valid count associated with the first set of physical addresses.

9. The data storage system according to claim 8 , further comprising:

means for initiating a write operation to write the host data associated with the logical address to a second physical address in the non-volatile memory; and

means for updating the address mapping table to map the logical address to the second physical address,

wherein the write operation writes metadata comprising the logical address to the second physical address with the host data associated with the logical address.

10. The data storage system according to claim 8 , wherein the means for checking for the indicator comprises checking a bit corresponding to the first physical address in a bit mask, wherein the first physical address is indicated as bad if the bit is set.

11. The data storage system according to claim 10 , further comprising means for setting the bit in the bit mask in response to an error occurring during a read operation to read data written to the first physical address.

12. The data storage system according to claim 8 , wherein the non-volatile memory comprises a plurality of non-volatile memory devices, and wherein the first set of physical addresses comprises a respective physical address in each of the plurality of non-volatile memory devices.

13. The data storage system according to claim 8 , further comprising:

means for determining the valid count associated with the first set of physical address is zero; and

means for designating the first set of physical addresses for erase operations.

14. A data storage system, comprising:

a non-volatile memory, the non-volatile memory comprises a plurality of non-volatile memory devices; and

a controller coupled to the non-volatile memory, wherein the controller is configured to:

receive a host write command to write host data associated with a logical address to a non-volatile memory;

determine a first physical address in the non-volatile memory mapped to the logical address in an address mapping table;

check for an indicator that the first physical address is bad;

if the first physical address is indicated as bad, maintain a valid count associated with a first set of physical addresses at a current value, wherein the first set of physical addresses comprises the first physical address, and wherein the first physical address indicated as bad is indicative of a read failure occurrence with the first physical address;

if the first physical address is not indicated as bad, mark the first physical address as invalid and decrementing the valid count associated with the first set of physical addresses;

initiate a write operation to write the host data associated with the logical address to a second physical address in the non-volatile memory; and

update the address mapping table to map the logical address to the second physical address.

15. The data storage according to claim 14 , wherein the write operation writes metadata comprising the logical address to the second physical address with the host data associated with the logical address.

16. The data storage according to claim 14 , wherein checking for the indicator comprises checking a bit corresponding to the first physical address in a bit mask, wherein the first physical address is indicated as bad if the bit is set.

17. The data storage according to claim 16 , wherein the controller is configured to:

set the bit in the bit mask in response to an error occurring during a read operation to read data written to the first physical address.

18. The data storage according to claim 14 , wherein the first set of physical addresses comprises a respective physical address in each of the plurality of non-volatile memory devices.

19. The data storage according to claim 14 , wherein the controller is configured to:

determine the valid count associated with the first set of physical address is zero; and

designate the first set of physical addresses for erase operations.

20. The method of claim 1 , further comprising:

removing a mapping between the logical address and the first physical address from the address mapping table, in response to determining that the first physical address is indicated as bad.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2017
From: CHENG, KAI-LUNG; LAI, YUN-TZUO; LISITSYN, EUGENE; LO, JERRY; PILLAI, SUBHASH BALAKRISHNA
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 043549/0580 →