Scheduling events in hardware design language simulation

1. A method for simulating a circuit design, comprising:

detecting, using a processor, an assignment for a signal of a circuit design during a delta cycle of a simulation of the circuit design;

comparing, using the processor, a range of the assignment for the signal with a range of an existing event for the signal for the delta cycle;

in response to determining that the range of the assignment for the signal and the range of the existing event meet a condition, updating, using the processor, the existing event resulting in a merged event; and

scheduling, using the processor, the merged event for execution for the delta cycle.

2. The method of claim 1 , further comprising:

executing the merged event.

3. The method of claim 1 , wherein the condition specifies that the range of the assignment is within the range of the existing event, wherein the updating comprises:

updating at least one bit of the existing event with a value of the assignment.

4. The method of claim 1 , wherein the condition specifies that the range of the assignment is adjacent to or overlaps with the range of the existing event, wherein the updating comprises:

creating the merged event by modifying at least one of a start index of the range of the existing event to correspond to a start index of the range of the assignment or an end index of the range of the existing event to correspond with an end index of the range of the assignment, wherein the creating the merged event further comprises updating a value of the existing event with a value of the assignment.

5. The method of claim 1 , wherein the merged event has a range that is different from the range of the existing event, the method further comprising:

comparing the merged event with a next event for the signal for the delta cycle; and

in response to determining that the range of the merged event is adjacent to, or overlaps with, a range of the next event for the signal for the delta cycle, updating the merged event based upon the next event and deleting the next event.

6. The method of claim 1 , wherein the merged event has a range that is different from the range of the existing event, the method further comprising:

comparing the merged event with a next event for the signal for the delta cycle; and

in response to determining that the range of the merged event is within a range of the next event for the signal for the delta cycle, updating the merged event and deleting the next event.

7. The method of claim 1 , further comprising:

comparing a further assignment for the signal with a further existing event for the signal for the delta cycle; and

in response to determining that a range of the further assignment for the signal and a range of the further existing event are disjoint, creating a new event for the further assignment for the signal for the delta cycle.

8. The method of claim 7 , wherein the further existing event is the merged event.

9. A system for simulating a circuit design, comprising:

a memory configured to store program code; and

a processor coupled to the memory, wherein the processor, in response to executing the program code, is configured to initiate operations including:

detecting an assignment for a signal of a circuit design during a delta cycle of a simulation of the circuit design;

comparing a range of the assignment for the signal with a range of an existing event for the signal for the delta cycle;

in response to determining that the range of the assignment for the signal and the range of the existing event meet a condition, updating the existing event resulting in a merged event; and

scheduling the merged event for execution for the delta cycle.

10. The system of claim 9 , wherein the processor is configured to initiate further operations comprising:

executing the merged event.

11. The system of claim 9 , wherein the condition specifies that the range of the assignment is within the range of the existing event, wherein the updating comprises:

updating at least one bit of the existing event with a value of the assignment.

12. The system of claim 9 , wherein the condition specifies that the range of the assignment is adjacent to or overlaps with the range of the existing event, wherein the updating comprises:

creating the merged event by modifying at least one of a start index of the range of the existing event to correspond to a start index of the range of the assignment or an end index of the range of the existing event to correspond with an end index of the range of the assignment, wherein the creating a merged event further comprises updating a value of the existing event with a value of the assignment.

13. The system of claim 9 , wherein the merged event has a range that is different from the range of the existing event, wherein the processor is configured to initiate further operations comprising:

comparing the merged event with a next event for the signal for the delta cycle; and

in response to determining that the range of the merged event is adjacent to, or overlaps with, a range of the next event for the signal for the delta cycle, updating the merged event based upon the next event and deleting the next event.

14. The system of claim 9 , wherein the merged event has a range that is different from the range of the existing event, wherein the processor is configured to initiate further operations comprising:

comparing the merged event with a next event for the signal for the delta cycle; and

in response to determining that the range of the merged event is within a range of the next event for the signal for the delta cycle, updating the merged event and deleting the next event.

15. The system of claim 9 , wherein the processor is configured to initiate further operations comprising:

comparing a further assignment for the signal with a further existing event for the signal for the delta cycle; and

in response to determining that a range of the further assignment for the signal and a range of the further existing event are disjoint, creating a new event for the further assignment for the signal for the delta cycle.

16. The system of claim 15 , wherein the further existing event is the merged event.

17. A computer program product comprising a computer readable storage medium having program code stored thereon, the program code executable by a processor to perform operations for simulating a circuit design, comprising:

detecting, using the processor, an assignment for a signal of a circuit design during a delta cycle of a simulation of the circuit design;

comparing, using the processor, a range of the assignment for the signal with a range of an existing event for the signal for the delta cycle;

in response to determining that the range of the assignment for the signal and the range of the existing event meet a condition, updating, using the processor, the existing event resulting in a merged event; and

scheduling, using the processor, the merged event for execution for the delta cycle.

18. The computer program product of claim 17 , wherein the program code is executable by a processor to perform operations further comprising:

executing the merged event.

19. The computer program product of claim 17 , wherein the condition specifies that the range of the assignment is within the range of the existing event, wherein the updating comprises:

updating at least one bit of the existing event with a value of the assignment.

20. The computer program product of claim 17 , wherein the condition specifies that the range of the assignment is adjacent to or overlaps with the range of the existing event, wherein the updating comprises:

creating the merged event by modifying at least one of a start index of the range of the existing event to correspond to a start index of the range of the assignment or an end index of the range of the existing event to correspond with an end index of the range of the assignment, wherein the creating the merged event further comprises updating a value of the existing event with a value of the assignment.