IP Library Granted Patent US 10,423,349
Granted Patent B2
US 10,423,349 · App. 15/684,206 · Granted Sep 24, 2019

Logical and physical address field size reduction by alignment-constrained writing technique

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,423,349
App. No.
15/684,206
Granted
Sep 24, 2019
Kind
B2
Abstract

A method that uses a reduced logical and physical address field size for storing data having steps of receiving a set of data to write to a solid state drive, determining a logical address to the set of data, setting a logical offset of the set of data to be equal to a physical block offset modulo of the data and writing the set of data to the solid state drive in locations on solid state drive that accept a size of the address of the set of data is disclosed.

Claims (70)

1. A method, comprising:

receiving a set of data to write to a solid state drive;

determining a logical address to the set of data;

setting a logical offset of the set of data to be equal to a physical block offset modulo of the physical address of the data; and

writing the set of data to the solid state drive in locations on the solid state drive that accept a size of the address of the set of data, wherein the physical block offset modulo of the physical address of the data is equal to one unique slot arrangement for each program unit.

2. The method according to claim 1 , further comprising:

writing the set of data to a buffer prior to the writing of the set of data to the solid state drive.

3. The method according to claim 2 , wherein the buffer has at least two buffers.

4. The method according to claim 3 , wherein a number of the at least two buffers is provided by a mathematical relationship.

5. A method, comprising:

receiving a set of data to write to a solid state drive;

determining a logical address to the set of data;

setting a logical offset of the set of data to be equal to a physical block offset modulo of the physical address of the data; and

writing the set of data to the solid state drive in locations on the solid state drive that accept a size of the address of the set of data writing the set of data to a buffer prior to the writing of the set of data to the solid state drive wherein the buffer has at least two buffers wherein a number of the at least two buffers is provided by a mathematical relationship, wherein the mathematical relationship is a straight line relationship in log space pertaining to a graph of a padding fraction verses a number of buffers.

6. The method according to claim 1 , wherein the physical block offset is equal to a number of possible allowed alignments.

7. The method according to claim 1 , wherein the writing of the set of data is in a reordered configuration from an original configuration for the set of data.

8. The method according to claim 6 , wherein the number of possible allowed alignments is chosen by one of a user and a system architect.

9. A method, comprising:

receiving a set of data to write to a solid state drive;

determining a logical address to the set of data;

setting a logical offset of the set of data to be equal to a physical block offset modulo of the physical address of the data; and

writing the set of data to the solid state drive in locations on the solid state drive that accept a size of the address of the set of data wherein the physical block offset is equal to a number of possible allowed alignments wherein the number of alignments is one unique slot arrangement for each program unit.

10. The method according to claim 2 , further comprising:

padding the set of data to fill the buffer.

11. The method according to claim 7 , wherein the writing occurs when a buffer is full of data.

12. The method according to claim 1 , further comprising:

establishing a maximum number of buffers; and

comparing a number of buffers created to the maximum number of buffers.

13. The method according to claim 12 , further comprising:

creating a new buffer for data to be added when the number of buffers created does not equal the maximum number of buffers.

14. The method according to claim 1 , further comprising:

checking if a further command to write a set of data is received.

15. The method according to claim 14 , further comprising:

writing all data in a buffer if no further command is received.

16. The method according to claim 13 , further comprising:

writing the data to the solid state drive when either of the buffer or the new buffer are full.

17. The method according to claim 16 , further comprising:

padding at least one of the buffer and the new buffer to fill the buffer.

18. The method according to claim 1 , wherein a maximum size of the logical address is 4 KB.

19. The method according to claim 1 , wherein the writing the set of data to the solid state drive in locations on solid state drive that accept the size of the address of the set of data is accomplished at a plurality of die.

20. The method according to claim 1 , wherein the set of data to be written is less than a page.

21. A method, comprising:

receiving a set of data to write to a memory device;

determining a logical address to the set of data;

setting a logical offset of the set of data to be equal to a physical block offset modulo of the physical address of the data;

determining if a maximum number of memory buffers has been reached;

determining if a new buffer is needed for storage of information;

creating a new buffer from memory when a new buffer is needed;

writing the set of data to the new buffer;

determining if the new buffer from memory is full with the set of data; and

writing the set of data from the new buffer to the memory device when the new buffer is full, wherein the physical block offset modulo of the physical address of the data is equal to one unique slot arrangement for each program unit.

22. The method according to claim 21 , wherein the memory device is a solid state drive.

23. The method according to claim 21 , wherein the maximum number of memory buffers is 64.

24. The method according to claim 21 , wherein the memory buffers are created in a volatile memory system.

25. A method, comprising:

receiving a set of data to write to a memory device;

determining a logical address to the set of data;

setting a logical offset of the set of data to be equal to a physical block offset modulo of the physical address of the data;

determining if a maximum number of memory buffers has been reached;

determining if a new buffer is needed for storage of information;

creating a new buffer from memory when a new buffer is needed;

writing the set of data to the new buffer;

determining if the new buffer from memory is full with the set of data;

determining if more data is available for processing from a host; and

writing contents of the new buffer to the memory device when no more data is available from the host, wherein the physical block offset modulo of the physical address of the data is equal to one unique slot arrangement for each program unit.

26. The method according to claim 25 , wherein the memory device is a solid state disk.

27. The method according to claim 25 , wherein the maximum number of memory buffers is 64.

28. The method according to claim 25 , wherein the memory buffers are created in a volatile memory system.

29. The method according to claim 25 , further comprising:

writing contents of the new buffer when the memory is full with the set of data.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2017
From: THOMAS, NICHOLAS JAMES
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 043465/0841 →