IP Library Granted Patent US 10,459,787
Granted Patent B2
US 10,459,787 · App. 15/709,769 · Granted Oct 29, 2019

Bad column handling in flash memory

Inventors: Damian Yurzola (Santa Clara, CA); Eran Sharon (Rishon Lezion, IL); Idan Alrod (Herzliya, IL); Michael Altshuler (Sunnyvale, CA); Madhuri Kotagiri (Santa Clara, CA); Rajeev Nagabhirava (Santa Clara, CA)
Assignee: SanDisk Technologies LLC
G06F11/1068G06F11/1012G11C29/52
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Quick Facts
Patent No.
US 10,459,787
App. No.
15/709,769
Granted
Oct 29, 2019
Kind
B2
Abstract

In a flash memory, redundant columns are used alternatively as replacement columns for replacing bad columns or to provide additional redundancy for ECC encoding. Locations of bad columns are indicated to a soft-input ECC decoder so that data bits from bad columns are treated as having a lower reliability than data bits from other columns.

Claims (14)

1. A nonvolatile memory system comprising:

a memory array having a plurality of columns, each of the plurality of columns comprising one or more bit lines; and

a soft-input error correction code decoder configured to receive hard data and soft data for at least one bad column of the plurality of columns and further configured to decode the hard data in combination with the soft data to generate decoded data,

wherein the soft data comprises compressed information including indication of locations of bad data within the at least one bad column, and

wherein the locations of bad data are replaced by indications of low likelihood.

2. The nonvolatile memory system of claim 1 , wherein the at least one bad column comprises at least one defective bit line.

3. The nonvolatile memory system of claim 1 , wherein the compressed information comprises compressed bit line location information.

4. The nonvolatile memory system of claim 1 , wherein the compressed information is obtained by dividing the plurality of columns into a plurality of sections and aggregating the plurality of sections into a folded page.

5. The nonvolatile memory system of claim 4 , wherein a folded page column within the folded page is indicated as a bad column based upon a location of the folded page column corresponding to a bad column location in any of the plurality of sections.

6. The nonvolatile memory system of claim 1 , wherein the memory array is a NAND flash memory array.

7. The nonvolatile memory system of claim 1 , wherein the plurality of columns comprise a plurality of non-redundant columns having the at least one bad column, and one or more redundant columns.

8. The nonvolatile memory system of claim 7 , wherein a portion of the at least one bad columns is replaced by the one or more redundant columns.

9. The nonvolatile memory system of claim 7 , wherein at least one of the one or more redundant columns is configured to store error correction code data.

10. The nonvolatile memory system of claim 7 , wherein each of the at least one bad column is assigned a rank between a high rank and a low rank.

Assignments (5)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2019
From: YURZOLA, DAMIAN; SHARON, ERAN; ALROD, IDAN; ALTSHULER, MICHAEL; KOTAGIRI, MADHURI; NAGABHIRAVA, RAJEEV
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 050438/0420 →
CHANGE OF NAME Recorded Sep 19, 2019
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 050438/0474 →
Continuity (4)
Division 14841317 · Aug 31, 2015
Division 13793282 · Mar 11, 2013
Provisional Application 61733064 · Dec 4, 2012
Related Publication 20180024880A1 · Jan 25, 2018