IP Library Granted Patent US 10,452,471
Granted Patent B2
US 10,452,471 · App. 15/730,454 · Granted Oct 22, 2019

Non-volatile memory with dynamic write abort detection and recovery

Inventors: Zhenlei Shen (Milpitas, CA); Nian Niles Yang (Mountain View, CA); Chao-Han Cheng (San Jose, CA)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G06F11/1048G06F3/0619G06F12/0246G11C11/5628G11C16/105G06F3/0679G06F3/0688G11C29/52
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Quick Facts
Patent No.
US 10,452,471
App. No.
15/730,454
Granted
Oct 22, 2019
Kind
B2
Abstract

A non-volatile storage apparatus includes a set of non-volatile memory cells and one or more control circuits in communication with the set of non-volatile memory cells. The one or more control circuits are configured to identify a most recently written portion of the set of non-volatile memory cells and to compare an error rate of data stored in the most recently written portion with a reference error rate from a reference portion of the set of non-volatile memory cells to determine whether the most recently written portion is fully written or partially written.

Claims (41)

1. A non-volatile storage apparatus, comprising:

a set of non-volatile memory cells; and

one or more control circuits in communication with the set of non-volatile memory cells, the one or more control circuits are configured to identify a most recently written page of a block of the set of non-volatile memory cells, identify a reference page in the set of non-volatile memory cells, decode data from the most recently written page and the reference page to obtain respective error rates, and to compare an error rate of data stored in the most recently written page with a reference error rate that is obtained from decoding of data read from the reference page of the set of non-volatile memory cells to determine whether the most recently written page is fully written or partially written.

2. The non-volatile storage apparatus of claim 1 wherein the most recently written page is a word line along a boundary between a written portion of the block and an unwritten portion of the block.

3. The non-volatile storage apparatus of claim 1 wherein the most recently written page is a word line in the block, the reference page is a reference word line in the block.

4. The non-volatile storage apparatus of claim 3 wherein the reference word line is a fully written word line that is located close to the word line in the block.

5. The non-volatile storage apparatus of claim 3 wherein the one or more control circuits are configured to store error rate distribution data for the set of non-volatile memory cells, and the one or more control circuits are configured to compare the error rates of data stored in the word line in the block and the reference word line according to a distribution of error rates for word lines within blocks of the set of non-volatile memory cells.

6. The non-volatile storage apparatus of claim 1 wherein the set of non-volatile memory cells includes at least an additional block, the most recently written page is a word line in the block, and the reference page is a reference word line in the additional block.

7. The non-volatile storage apparatus of claim 6 wherein the additional block is physically adjacent to the block and the reference word line is similarly located in the additional block as the word line is located in the first block.

8. The non-volatile storage apparatus of claim 6 wherein the one or more control circuits are configured to store error rate distribution data for the set of non-volatile memory cells, and the one or more control circuits are configured to compare the error rates of data stored in the word line in the block and the reference word line in the additional block according to a distribution of error rates from block to block of the set of non-volatile memory cells.

9. The non-volatile storage apparatus of claim 1 wherein the one or more control circuits are configured to generate a corrected copy of data from the most recently written page and to fully write the corrected copy to the most recently written page without erasing the most recently written page.

10. The non-volatile storage apparatus of claim 1 wherein the set of non-volatile memory cells are monolithically formed in one or more physical levels of arrays of memory cells having an active area disposed above a silicon substrate.

11. A method of identifying a partially written page, comprising:

identifying a most recently written page in a partially written block;

reading first data from the most recently written page;

determining a first error rate of the first data;

determining that the first data is correctable based on the first error rate;

identifying a reference page in the non-volatile memory;

reading second data from the reference page;

determining a second error rate of the second data; and

determining a condition of the most recently written page as a partially written condition from comparison of the first error rate and the second error rate.

12. The method of claim 11 further comprising identifying the most recently written page in the partially written block by performing a binary search of the partially written block to identify a boundary between a written portion and an unwritten portion.

13. The method of claim 11 further comprising in response to determining the condition of the most recently written page in the partially written block as a partially written condition due to an interrupted write operation, generating a corrected copy of data from the most recently written page in the partially written block.

14. The method of claim 13 further comprising, in a continuation of the interrupted write operation, fully writing the most recently written page in the partially written block with the corrected copy of the data.

15. The method of claim 11 further comprising:

determining whether the partially written block contains a fully written page that is representative of the partially written block;

in response to determining that the partially written block contains a fully written page that is representative of the partially written block, using the fully written page as the reference page to determine the reference error rate; and

in response to determining that the partially written block does not contain a fully written page that is representative of the partially written block, using a page of a neighboring block as the reference page to determine the reference error rate.

16. The method of claim 11 wherein determining the condition of the most recently written page as a partially written condition includes:

determining that the first error rate is less than K times the second error rate, where K is obtained from a page-to-page error distribution of error rates in a block.

17. The method of claim 11 further comprising:

determining that a power loss has occurred and in response initiating the identifying the most recently written page in the partially written block.

18. The method of claim 11 further comprising maintaining error rate distribution data for the non-volatile memory and wherein the determining the condition of the most recently written page in the partially written block as a partially written condition includes using error rate distribution data and the second error rate to calculate an error rate limit, the most recently written page determined to be partially written if the first error rate exceeds the error rate limit.

19. A system comprising:

a set of non-volatile memory cells;

means for identifying a most recently written word line of a partially written block in the set of non-volatile memory cells;

means for selecting a reference word line in the set of non-volatile memory cells;

means for obtaining error rates for data stored in the most recently written word line and the reference word line;

means for recording error rate distribution information for the set of non-volatile memory cells; and

means for comparing a first error rate for the most recently written word line and a reference error rate obtained from reading and decoding data from the reference word line according to the error rate distribution information to determine if the most recently written word line was partially written or fully written, the first error rate is correctable by Error Correction Code (ECC).

20. The system of claim 19 wherein the means for selecting the reference word line is configured to select a word line of the partially written block or from another block that is adjacent to the partially written block.

Assignments (10)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2017
From: SHEN, ZHENLEI; YANG, NIAN NILES; CHENG, CHAO-HAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 043876/0052 →
Cited By (2)
US 12,487,883 US 12,620,450