IP Library Granted Patent US 10,915,475
Granted Patent B2
US 10,915,475 · App. 15/782,829 · Granted Feb 9, 2021

Methods and apparatus for variable size logical page management based on hot and cold data

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Quick Facts
Patent No.
US 10,915,475
App. No.
15/782,829
Granted
Feb 9, 2021
Kind
B2
Abstract

Aspects of the disclosure provide for management of a flash translation layer (FTL) for a non-volatile memory (NVM) in a Solid State Drive (SSD). The methods and apparatus provide a logical to physical (L2P) table where a first portion of the table is used for mapping frequently accessed hot data to a first subdrive in the NVM. Additionally, a second portion of the L2P table is provided for mapping cold data less frequently accessed than the hot data to a second subdrive, where logical blocks for storing the cold data in the second subdrive are larger than logical blocks storing the hot data in the first subdrive. Separation of the L2P table into hot and cold subdrives reduces the L2P table size that is needed in RAM for logical to physical memory mapping, while at the same time provides lower write amplification and latencies, especially for large capacity SSDs.

Claims (53)

1. A method of managing a flash translation layer (FTL) for a non-volatile memory (NVM), the method comprising:

providing a logical to physical (L2P) table with an NVM controller that includes:

bifurcating the L2P table into a first L2P table portion and a second L2P table portion, wherein the first L2P table portion and the second L2P table portion are different from and non-overlapping with each other,

wherein the first L2P table portion of the L2P table maps frequently accessed hot data to a first subdrive in the NVM, and

wherein the second L2P table portion of the L2P table maps cold data less frequently accessed than the hot data to a second subdrive in the NVM, wherein logical blocks for storing the cold data in the second subdrive are configured to be larger than logical blocks for storing the hot data in the first subdrive;

generating a first bitmap that is separate from the first and second L2P table portions of the L2P table, the first bitmap having at least one bit field configured to indicate whether a logical page mapping of a particular logical page to be accessed is located in the first L2P table portion of the L2P table;

reading the at least one bit field in the first bitmap for an indication of whether the logical page mapping of the particular logical page to be accessed is located in the first L2P table portion or the second L2P table portion; and

performing, responsive to the reading of the at least one bit field, a lookup of the particular logical page mapping in the first L2P table portion or the second L2P table portion based on the indication.

2. The method of claim 1 ,

wherein the reading the at least one bit field comprises accessing the at least one bit field in the first bitmap during a page lookup by the NVM controller, the method further comprising:

accessing the particular logical page from the first subdrive using the first L2P table portion of the L2P table when the at least one bit field indicates that the logical page mapping of the particular logical page to be accessed is located in the first L2P table portion, and

searching the second L2P table portion of the L2P table for the logical page mapping of the particular logical page when the at least one bit field indicates that the logical page mapping of the particular logical page to be accessed is not located in the first L2P table portion.

3. The method of claim 1 , further comprising:

each of the first and second L2P table portions of the L2P table including a plurality of entries each containing a logical page mapping comprising an erase block (EB) index and a page index that map a logical address to a physical address in the respective first subdrive and second subdrive.

4. The method of claim 3 , wherein at least one of the plurality of entries in the second L2P table portion further comprises a second bitmap configured to indicate one or more portions of a logical page stored in the first subdrive and one or more portions stored in the second subdrive.

5. The method of claim 3 , further comprising:

mapping EB index values to respective EB numbers with the NVM controller.

6. The method of claim 1 , wherein the first and second L2P table portions of the L2P table are implemented in a DDR RAM memory in communication with the NVM controller.

7. The method of claim 1 , further comprising:

initially writing data to the first subdrive for all data to be stored in the NVM by a host device.

8. The method of claim 7 , further comprising:

during writing of data by the host device, searching for a logical page in the first and second subdrives; and

marking a previous mapping invalid when the logical page is found from the search.

9. The method of claim 1 , further comprising:

recycling data from the first subdrive to the second subdrive when the data is determined to be cold data including accumulating logical pages from the first subdrive that belong to a larger logical page unit to be stored in the second subdrive; and

combining the accumulated logical pages and storing the pages as the larger logical page unit in the second subdrive.

10. A solid state drive (SSD) comprising:

a non-volatile memory (NVM); and

a controller communicatively coupled to a host device and the NVM, wherein the controller is configured to:

generate a logical to physical (L2P) table that includes:

bifurcating the L2P table into a first L2P table portion and a second L2P table portion, wherein the first L2P table portion and the second L2P table portion are different from and non-overlapping with each other,

wherein the first L2P table portion of the L2P table maps frequently accessed hot data to a first subdrive in the NVM, and

wherein the second L2P table portion of the L2P table maps cold data less frequently accessed than the hot data to a second subdrive in the NVM, wherein logical blocks for storing the cold data in the second subdrive are configured to be larger than logical blocks for storing the hot data in the first subdrive, and

maintain a first bitmap that is separate from the first and second L2P table portions of the L2P table, the first bitmap having at least one bit field configured to indicate whether a logical page mapping of a particular logical page to be accessed is located in the first L2P table portion of the L2P table,

read the at least one bit field in the first bitmap for an indication of whether the logical page mapping of the particular logical page to be accessed is located in the first L2P table portion or the second L2P table portion, and

perform, responsive to the read of the at least one bit field, a lookup of the particular logical page mapping in the first L2P table portion or the second L2P table portion based on the indication.

11. The solid state drive of claim 10 ,

wherein the controller configured to read the at least one bit field is configured to access the at least one bit field in the first bitmap during a page lookup by the controller; and

wherein the controller is further configured to:

access the particular logical page from the first subdrive using the first L2P table portion of the L2P table when the at least one bit field indicates that the logical page mapping of the particular logical page to be accessed is located in the first L2P table portion, and

search the second L2P table portion of the L2P table for the logical page mapping of the particular logical page when the at least one bit field indicates that the logical page mapping of the particular logical page to be accessed is not located in the first L2P table portion.

12. The solid state drive of claim 10 , wherein each of the first and second L2P table portions of the L2P table including a plurality of entries each containing a logical page mapping including an erase block (EB) index and a page index that map a logical address to a physical address in the respective first subdrive and second subdrive.

13. The solid state drive of claim 12 , wherein at least one of the plurality of entries in the second L2P table portion further comprises a second bitmap configured to indicate one or more portions of a logical page stored in the first subdrive and one or more portions stored in the second subdrive.

14. The solid state drive of claim 10 , wherein the controller is further configured to implement the first and second L2P table portions of the L2P table in a DDR RAM memory in communication with the controller.

15. The solid state drive of claim 10 , wherein the controller is further configured to:

initially write all data to be stored by the host device in the first subdrive,

search for a logical page in the first and second subdrives during writing of data by the host device; and

mark a previous mapping invalid when the logical page is found from the search.

16. The solid state drive of claim 10 , wherein the controller is further configured to:

recycle data from the first subdrive to the second subdrive when the data is determined to be cold data including accumulating logical pages from the first subdrive that belong to a larger logical page unit to be stored in the second subdrive; and

combine the accumulated logical pages and storing the pages as the larger logical page unit in the second subdrive.

17. The method of claim 1 , wherein an entirety of the L2P table including the first and second L2P table portions is stored in a DDR RAM memory.

18. The solid state drive of claim 10 , wherein the controller is further configured to store an entirety of the L2P table including the first and second L2P table portions in a DDR RAM memory.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 6TH INVENTOR'S LAST NAME PREVIOUSLY RECORDED AT REEL: 043973 FRAME: 0935. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 4, 2018
From: DUBEY, RISHABH; DAS PURKAYASTHA, SAUGATA; KAVIRAYANI, CHAITANYA; RAJA MURTHY, SAMPATH; GUPTA, NITIN; MATHADA, REVANASIDDAIAH PRABHUSWAMY
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 046104/0667 →