IP Library Granted Patent US 10,717,141
Granted Patent B2
US 10,717,141 · App. 15/796,173 · Granted Jul 21, 2020

Connection verification technique

Inventor: Thomas Kinsley (Boise, ID)
Assignee: Micron Technology, Inc.
B23K1/0016G01R31/71H05K1/0268H05K1/111H05K3/3436H05K2201/09663H05K2201/09809H05K2201/10734H05K2203/163H05K2203/175Y02P70/611Y10T29/49004Y10T29/4913Y10T29/49128Y10T29/49144
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Quick Facts
Patent No.
US 10,717,141
App. No.
15/796,173
Granted
Jul 21, 2020
Kind
B2
Abstract

Some embodiments of the present invention are generally directed to testing connections of a memory device to a circuit board or other device. In one embodiment, a memory device that is configured to facilitate continuity testing between the device and a printed circuit board or other device is disclosed. The memory device includes a substrate and two connection pads that are electrically coupled to one another via a test path. A system and method for testing the connections between a memory device and a circuit board or other device are also disclosed, as are additional techniques for detecting excess temperature and enabling special functionalities using multi-stage connection pads.

Claims (26)

1. A method comprising:

positioning a solder ball between a first connection pad of a first substrate of a memory device and a second connection pad of a second substrate, the first connection pad comprising a multi-stage connection pad having multiple conductive pads electrically isolated from one another, wherein one conductive pad of the multiple conductive pads on the memory device is arranged to facilitate communication between the memory device and the second connection pad, and wherein one additional conductive pad of the multiple conductive pads is coupled to additional circuitry of the memory device such that one additional functionality of the memory device is only enabled by a high temperature reflow of the solder ball; and

heating the solder ball sufficiently to enable the one additional functionality of the memory device.

2. The method of claim 1 , wherein heating the solder ball deforms the solder ball to electrically couple the one conductive pad to the one additional conductive pad.

3. The method of claim 1 , wherein the one conductive pad is completely surrounded by the one additional conductive pad, and wherein heating the solder ball deforms the solder ball to electrically couple the one conductive pad to the one additional conductive pad through the solder ball.

4. The method of claim 1 , wherein the multi-stage connection pad comprises the one conductive pad, the additional conductive pad and a third conductive pad, and wherein heating the solder ball deforms the solder ball to electrically couple each of the one conductive pad, the additional conductive pad and the third conductive pad to one another.

5. The method of claim 1 , wherein the one conductive pad of the multiple conductive pads on the memory device is arranged to facilitate communication between the memory device and external circuitry coupled to the second connection pad on the second substrate.

6. The method of claim 1 , wherein the one additional functionality is related to one of address functionality or data functionality.

7. The method of claim 1 , wherein the one additional functionality is related to one of power functionality or ground functionality.

8. A method comprising:

positioning a solder ball on a first connection pad of a memory device, the first connection pad comprising a multi-stage connection pad having an inner conductive pad and an outer conductive pad electrically isolated from one another, wherein the outer conductive pad of the multi-stage connection pad is coupled to additional circuitry of the memory device such that one additional functionality of the memory device is only enabled by a high temperature reflow of the solder ball; and

heating the solder ball sufficiently to reflow the solder ball to enable the one additional functionality of the memory device.

9. The method of claim 8 , wherein the inner conductive pad is completely surrounded by the outer conductive pad, and wherein heating the solder ball deforms the solder ball to electrically couple the inner conductive pad to the outer conductive pad through the solder ball.

10. The method of claim 8 , wherein the multi-stage connection pad comprises the inner conductive pad, the outer conductive pad and a third conductive pad, and wherein heating the solder ball deforms the solder ball to electrically couple each of the inner conductive pad, the outer conductive pad and a third conductive pad to one another.

11. The method of claim 8 , wherein the multi-stage connection pad on the memory device is arranged to facilitate communication between the memory device and a printed circuit board through the solder ball.

12. The method of claim 8 , wherein the one additional functionality is related to one of address functionality or data functionality.

13. The method of claim 8 , wherein the one additional functionality is related to one of power functionality or ground functionality.

14. A method comprising:

positioning a solder ball on a first connection pad of a memory device, wherein the first connection pad of the memory device is electrically coupled to a second connection pad of the memory device through a test path, wherein the second connection pad is coupled to additional circuitry providing additional functionality of the memory device, and wherein each of the first and second connection pads comprises a multi-stage connection pad including an inner conductive pad and an outer conductive pad, wherein the inner and outer conductive pads are electrically isolated from one another; and

heating the solder ball sufficiently to reflow the solder ball to enable the additional functionality of the memory device.

15. The method of claim 14 , wherein positioning the solder ball comprises positioning the solder ball between the first connection pad of the memory device and a third connection pad on a substrate arranged above or below the memory device.

16. The method of claim 15 , wherein the third connection pad is not a multi-stage connection pad.

17. The method of claim 15 , wherein heating the solder ball deforms the solder ball to electrically couple the inner conductive pad of the first connection pad to each of the outer conductive pad of the first connection pad and the third connection pad through the solder ball.

18. The method of claim 14 , wherein heating the solder ball deforms the solder ball to electrically couple the inner conductive pad of the first connection pad to each of the outer conductive pad of the first connection pad and the additional circuitry coupled to the second connection pad.

19. The method of claim 14 , wherein the one additional functionality is related to one of address functionality or data functionality.

20. The method of claim 14 , wherein the additional functionality is related to one of power functionality or ground functionality.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050716/0678 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 7 TO PATENT SECURITY AGREEMENT Recorded Feb 6, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 045267/0833 →
Continuity (4)
Division 14073607 · Nov 6, 2013
Division 12938208 · Nov 2, 2010
Division 11323757 · Dec 30, 2005
Related Publication 20180043450A1 · Feb 15, 2018