Optical electronic-chip identification writer using dummy C4 bumps
Embodiments of the invention are directed to a method and resulting structures for forming optically readable chip identification (CID) codes using dummy controlled collapse chip connection (C4) bumps. In a non-limiting embodiment of the invention, a product chip is formed on a wafer. A chip location identifier including a plurality of controlled collapse chip connection (C4) bumps is formed on a surface of the product chip. The chip location identifier encodes a unique location of the product chip on the wafer prior to dicing. The plurality of C4 bumps are arranged into one or more optically readable alphanumeric characters.
1. A method for forming a semiconductor device, the method comprising:
forming a product chip on a wafer; and
forming a chip location identifier comprising a plurality of controlled collapse chip connection (C4) bumps on a surface of the product chip, the chip location identifier encoding a unique location of the product chip on the wafer prior to dicing;
wherein the plurality of C4 bumps are arranged into one or more optically readable alphanumeric characters that comprise a hexadecimal code, wherein each hexadecimal digit is mapped to a unique dot pattern of C4 bumps.
2. The method of claim 1 , wherein the hexadecimal code is a four or five digit hexadecimal code.
3. The method of claim 1 , wherein each unique dot pattern comprises a three C4 bump wide by five C4 bump high grid.
4. The method of claim 1 , wherein each unique dot pattern comprises a 1-dimensional C4 bump pattern.
5. The method of claim 1 further comprising dicing the wafer to detach the product chip.
6. The method of claim 1 , wherein the plurality of C4 bumps are dummy C4 bumps.
7. The method of claim 1 , wherein the alphanumeric characters comprise a base 10 code or a binary code.
8. The method of claim 1 , wherein the chip location identifier is formed in a corner region of the product chip.
9. The method of claim 1 , wherein the chip location identifier is formed in an electrically inactive central or peripheral region of the product chip.
10. A method for encoding a chip location identifier onto a surface of an integrated circuit (IC) chip, the method comprising:
forming the IC chip on a wafer;
forming a photoresist layer over the surface of the IC chip;
patterning the photoresist layer to expose one or more portions of the IC chip, the one or more exposed portions arranged to form a hexadecimal code, the hexadecimal code encoding chip location identification data; and
forming a controlled collapse chip connection (C4) bump on each exposed portion of the IC chip.
11. The method of claim 10 , wherein the photoresist layer is patterned using a direct write laser exposure or programmable lithography.
12. The method of claim 10 , wherein the chip location identification data comprises a unique location of the chip on the wafer prior to dicing.
13. The method of claim 10 , wherein the chip location identification data is optically readable.
14. The method of claim 10 further comprising recording the chip location identification data in a data structure.
15. The method of claim 14 , wherein the chip location identification data recorded in the data structure comprises a unique location of the IC chip on the wafer prior to dicing.
16. A semiconductor device comprising:
an integrated circuit (IC) chip; and
a chip location identifier comprising a plurality of controlled collapse chip connection (C4) bumps on a surface of the IC chip, the chip location identifier encoding a unique location of the IC chip on a wafer prior to dicing;
wherein the plurality of C4 bumps are arranged into one or more alphanumeric characters that comprise a hexadecimal code, wherein each hexadecimal digit is mapped to a unique dot pattern of C4 bumps.
17. The semiconductor device of claim 16 , wherein the alphanumeric characters comprise a hexadecimal code.
18. The semiconductor device of claim 17 , wherein the hexadecimal code is a four or five digit hexadecimal code.