Display device including transistor and manufacturing method thereof
An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.
1. A semiconductor device comprising:
a transistor comprising:
a first gate electrode over a substrate;
a first gate insulating layer over the first gate electrode;
an oxide semiconductor layer over the first gate insulating layer;
a first insulating layer over the oxide semiconductor layer;
a source electrode and a drain electrode over the first insulating layer;
a second insulating layer over the source electrode and the drain electrode; and
a second gate electrode over the second insulating layer;
a resin layer over the second gate electrode;
a pixel electrode over the resin layer;
a light emitting layer over the pixel electrode; and
an electrode over the light emitting layer,
wherein the first insulating layer and the second insulating layer are configured to be a second gate insulating layer,
wherein the second gate electrode comprises a transparent conductive layer,
wherein the second gate electrode overlaps the source electrode and the drain electrode,
wherein in a channel length direction of the transistor, a length of the first gate electrode is larger than a length of the oxide semiconductor layer, and
wherein in the channel length direction of the transistor, a length of the second gate electrode is smaller than the length of the oxide semiconductor layer.
2. The semiconductor device according to claim 1 , wherein the first insulating layer is configured to be a channel protective film.
3. The semiconductor device according to claim 1 , wherein the resin layer is a planarization layer.
4. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.
5. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises a microcrystalline region.
6. A semiconductor device comprising:
a first conductive layer over a substrate;
a first insulating layer over the first conductive layer;
an oxide semiconductor layer over the first insulating layer;
a second conductive layer in contact with a top surface of the oxide semiconductor layer;
a third conductive layer in contact with the top surface of the oxide semiconductor layer;
a second insulating layer over the oxide semiconductor layer;
a fourth conductive layer over the second insulating layer; and
a metal layer for shielding at least part of the oxide semiconductor layer from light,
wherein the first conductive layer comprises a region configured to serve as a first gate of a transistor,
wherein the fourth conductive layer comprises a region configured to serve as a second gate of the transistor,
wherein in a channel length direction of the transistor, a length of the first conductive layer is larger than a length of the oxide semiconductor layer,
wherein in the channel length direction of the transistor, a length of the fourth conductive layer is smaller than the length of the oxide semiconductor layer,
wherein the fourth conductive layer transmits light,
wherein the oxide semiconductor layer comprises a first region and a second region,
wherein the first region overlaps with the second conductive layer or the third conductive layer,
wherein the second region does not overlap with the second conductive layer and the third conductive layer,
wherein a thickness of the oxide semiconductor layer in the second region is smaller than a thickness of the oxide semiconductor layer in the first region, and
wherein the metal layer overlaps with the second region.
7. The semiconductor device according to claim 6 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.
8. The semiconductor device according to claim 6 , wherein the oxide semiconductor layer comprises a microcrystalline region.
9. A semiconductor device comprising:
a first conductive layer over a substrate;
a first insulating layer over the first conductive layer;
an oxide semiconductor layer over the first insulating layer;
a second conductive layer in contact with a top surface of the oxide semiconductor layer;
a third conductive layer in contact with the top surface of the oxide semiconductor layer;
a second insulating layer over the oxide semiconductor layer;
a fourth conductive layer over the second insulating layer; and
a metal layer for shielding at least part of the oxide semiconductor layer from light,
wherein the first conductive layer comprises a region configured to serve as a first gate of a transistor,
wherein the fourth conductive layer comprises a region configured to serve as a second gate of the transistor,
wherein in a channel length direction of the transistor, a length of the first conductive layer is larger than a length of the oxide semiconductor layer,
wherein in the channel length direction of the transistor, a length of the fourth conductive layer is smaller than the length of the oxide semiconductor layer,
wherein the fourth conductive layer transmits light, and
wherein the metal layer overlaps with the fourth conductive layer and the oxide semiconductor layer.
10. The semiconductor device according to claim 9 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.
11. The semiconductor device according to claim 9 , wherein the oxide semiconductor layer comprises a microcrystalline region.