IP Library Granted Patent US 10,635,400
Granted Patent B2
US 10,635,400 · App. 15/839,668 · Granted Apr 28, 2020

Seed generation

Inventors: Eran Sharon (Rishon Lezion, IL); Yoav Weinberg (Haifa, IL); Karin Inbar (Ramat Hasharon, IL); Omer Fainzilber (Even Yehuda, IL); Stella Achtenberg (Netanya, IL); Nika Yanuka (Hadera, IL)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G06F7/582G06F12/0246G06F12/14G11C16/3427G06F2212/402
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Quick Facts
Patent No.
US 10,635,400
App. No.
15/839,668
Granted
Apr 28, 2020
Kind
B2
Abstract

Apparatuses, systems, methods, and computer program products are disclosed for seed generation. An apparatus includes a memory element. An apparatus includes a scrambler component. A scrambler component includes a random seed generation circuit that generates a random seed. A scrambler component includes a deterministic seed generation circuit that generates a deterministic seed based on a physical address of a memory element for storing data. A scrambler component includes a computation circuit that forms a computed seed based on a random seed and a deterministic seed. Data is scrambled using a computed seed before data is stored.

Claims (42)

1. A method comprising:

generating a seed based on a random seed and an entire physical address of a storage device for storing data, wherein generating the seed comprises:

generating the seed based on the random seed and a hamming code determined using the entire physical address for storing the data; and

transforming the entire physical address so that seeds for physically adjacent addresses have a number of bit differences satisfying a threshold greater than one; and

storing the seed with the data.

2. The method of claim 1 , further comprising scrambling the data using the seed.

3. The method of claim 2 , further comprising storing the data at the physical address.

4. The method of claim 1 , further comprising determining the seed based on information stored at the physical address.

5. The method of claim 4 , further comprising descrambling the data based on the seed.

6. An apparatus comprising:

a memory element; and

a scrambler component comprising:

a random seed generation circuit that generates a random seed;

a deterministic seed generation circuit that generates a deterministic seed based on an entire physical address of the memory element for storing data, wherein:

the deterministic seed is generated by one or more of:

performing a transformation, the result of which is based on the entire physical address; and

by encoding the entire physical address using a non-linear code;

the deterministic seed generation circuit generates the deterministic seed such that the deterministic seed satisfies a minimum distance threshold from another seed for an adjacent physical address; and

the minimum distance threshold comprises the deterministic seed being different from another seed for an adjacent physical address by at least two bits; and

a computation circuit that forms a computed seed based on the random seed and the deterministic seed, wherein the data is scrambled using the computed seed before the data is stored.

7. The apparatus of claim 6 , wherein the random seed generation circuit comprises a random number generator used to generate the random seed.

8. The apparatus of claim 6 , wherein the random seed is generated based on a system clock.

9. The apparatus of claim 6 , wherein the minimum distance threshold comprises the deterministic seed being different from another seed for the adjacent physical address by at least four bits.

10. The apparatus of claim 6 , wherein the deterministic seed generation circuit generates the deterministic seed such that the deterministic seed is not a linear combination of a set of deterministic seeds associated with adjacent physical addresses.

11. The apparatus of claim 6 , wherein the computed seed comprises the random seed.

12. The apparatus of claim 6 , wherein the computed seed comprises a result of a logic operation performed on the random seed and the deterministic seed.

13. The apparatus of claim 12 , wherein the logic operation comprises an exclusive or operation.

14. The apparatus of claim 12 , wherein the computed seed comprises a concatenation of the result of the logic operation and the random seed.

15. An apparatus comprising:

means for generating a random seed;

means for generating a deterministic seed based on an entire physical address for storing scrambled data, wherein:

the deterministic seed is generated by one or more of:

performing a transformation, the result of which is based on the entire physical address; and

by encoding the entire physical address using a non-linear code;

the deterministic seed generation circuit generates the deterministic seed such that the deterministic seed satisfies a minimum distance threshold from another seed for an adjacent physical address; and

the minimum distance threshold comprises the deterministic seed being different from another seed for an adjacent physical address by at least two bits;

means for generating a scrambling seed using the random seed and the deterministic seed;

means for scrambling data using the scrambling seed to produce the scrambled data;

means for storing the scrambled data;

means for extracting the scrambling seed from the scrambled data; and

means for unscrambling the scrambled data using the scrambling seed.

16. The apparatus of claim 15 , wherein the means for extracting the scrambling seed further comprises means for extracting the deterministic seed from the scrambled data.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2018
From: SHARON, ERAN; WEINBERG, YOAV; INBAR, KARIN; FAINZILBER, OMER; ACHTENBERG, STELLA; YANUKA, NIKA
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045544/0199 →
Cited By (1)
US 12,650,776